cat build/fpga/*.ucf > build/fpga/main.ucf
$(xilinx_ise)ngdbuild ${intstyle} -aul -dd _ngo -nt timestamp -uc main.ucf -p $(device) main.ngc main.ngd
$(xilinx_ise)map ${intstyle} -ol ${effort} -p $(device) -pr b -cm ${opt_for} -o main_map.ncd main.ngd main.pcf
$(xilinx_ise)par ${intstyle} -pl ${effort} -ol ${effort} -w main_map.ncd main.ncd main.pcf
$(xilinx_ise)trce ${intstyle} -e 3 -l 3 -s ${speed_grade} -xml main main.ncd -o main.twr main.pcf
$(xilinx_ise)bitgen ${intstyle} -f main.ut main.ncd
cat build/fpga/*.ucf > build/fpga/main.ucf
$(xilinx_ise)ngdbuild ${intstyle} -aul -dd _ngo -nt timestamp -uc main.ucf -p $(device) main.ngc main.ngd
$(xilinx_ise)map ${intstyle} -ol ${effort} -p $(device) -pr b -cm ${opt_for} -o main_map.ncd main.ngd main.pcf
$(xilinx_ise)par ${intstyle} -pl ${effort} -ol ${effort} -w main_map.ncd main.ncd main.pcf
$(xilinx_ise)trce ${intstyle} -e 3 -l 3 -s ${speed_grade} -xml main main.ncd -o main.twr main.pcf
$(xilinx_ise)bitgen ${intstyle} -f main.ut main.ncd