- $(xilinx_ise)xst -intstyle xflow -ifn main.xst -ofn main.syr < main.xst
- $(xilinx_ise)ngdbuild -aul -intstyle xflow -dd _ngo -nt timestamp -uc main.ucf -p $(device) main.ngc main.ngd
- $(xilinx_ise)map -cm area -intstyle xflow -p $(device) -pr b -ol high -o main_map.ncd main.ngd main.pcf
- $(xilinx_ise)par -w -intstyle xflow -t 99 -pl high -rl high main_map.ncd main.ncd main.pcf
- $(xilinx_ise)bitgen -intstyle xflow -f main.ut main.ncd
-# $(xilinx_ise)trce -intstyle xflow -e 3 -l 3 -s ${speed_grade} -xml main main.ncd -o main.twr main.pcf
- $(xilinx_edk)xmd -tcl $(remote_edk)/data/xmd/genace.tcl -jprog -hw main.bit -board ml410 -ace mainx.ace
- mv build/fpga/mainx.ace build/fpga/main.ace # genace throws a fit if the filename prefix is the same?
+ $(xilinx_ise)xst -intstyle xflow -ifn main.xst -ofn main.syr < main.xst
+ $(xilinx_ise)ngdbuild -intstyle xflow -aul -dd _ngo -nt timestamp -uc main.ucf -p $(device) main.ngc main.ngd
+ $(xilinx_ise)map -intstyle xflow -ol ${effort} -p $(device) -pr b -cm area -o main_map.ncd main.ngd main.pcf
+ $(xilinx_ise)par -intstyle xflow -ol ${effort} -w main_map.ncd main.ncd main.pcf
+ $(xilinx_ise)bitgen -intstyle xflow -f main.ut main.ncd
+# $(xilinx_ise)trce -intstyle xflow -e 3 -l 3 -s ${speed_grade} -xml main main.ncd -o main.twr main.pcf
+# $(xilinx_edk)xmd -tcl $(remote_edk)/data/xmd/genace.tcl -jprog -hw main.bit -board ${board} -ace mainx.ace
+# mv build/fpga/mainx.ace build/fpga/main.ace # genace throws a fit if the filename prefix is the same?