-\begin{itemize}
- \item [\tt Rev] ({\bf Reverse Before Enqueue})
- \item [\tt Inv] ({\bf Invert Count}) -- treat {\tt Count} as {\tt 37-Offset-Count}
- \item [\tt Count] ({\bf Count of Bits To Enqueue})
- \item [\tt Offset] ({\bf Offset of Bits To Enqueue})
-\end{itemize}
-
-By default, bits are enqueued {\it most significant bit first} (bits
-in Sun byte order). If {\tt Rev=1}, the bits are reversed before
-performing the directions below.
-
-If {\tt Inv=1}, then the {\tt Count} field is treated as if its value
-was actually {\tt 37-Offset-Count} for all directions below.
-
-
-
-\pagebreak
-
-\section*{inDequeueOp}
-\setlength{\bitwidth}{6mm}
-{\tt\scriptsize
-\begin{bytefield}{23}
- \bitheader[b]{0,5,6,11-21,22}\\
- \bitbox{2}{Until}
- \bitbox{1}{Sort}
- \bitbox{1}{Get}
- \bitbox{1}{Rev}
- \bitbox{1}{Inv}
- \bitbox{1}{Rst}
- \bitbox{2}{Left\\ Fill}
- \bitbox{2}{Right\\ Fill}
- \bitbox{6}{Count}
- \bitbox{6}{Offset}
-\end{bytefield}
-}
+\subsection*{Dequeueing}
+
+Bits are dequeued by providing a code word at the {\tt outOp} port
+(despite its name, this is actually an {\it input port}). As shown in
+the constant diagram, this code word has fields {\tt lsbFirst}, {\tt
+msbFirst}, {\tt signExtend}, {\tt drop}, {\tt take}, and {\tt copy}
+fields.
+
+Before additional processing, {\tt drop} bits are discarded from the
+head of the fifo. Next, bits are dequeued into an empty word-width
+register. If the {\tt msbFirst} flag is set, bits will be deposited
+into this register starting with the most significant bit of the
+register and working towards the least significant bit. If the {\tt
+lsbFirst} flag is set, bits will be deposited into this register
+starting with the {\it least} significant bit of the register and
+working towards the {\it most} significant bit. The number of bits
+dequeued is specified by the {\tt take} field. If the {\tt copy}
+field is specified instead, the bits will be {\it copied} out of the
+fifo rather than being removed.
+
+Finally, if the {\tt signExtend} bit is set, all bits in the register
+which were not filled by bits dequeued from the fifo will be filled
+with a copy of {\it the last bit dequeued from the fifo}.
+
+As a final addendum to the above, whenever a request arrives at {\tt
+outOp} which requires more bits than are available in the fifo, the
+operation will wait until enough bits are present.
+
+\subsection*{To Do}