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Marina/MarinaTest.java: a few hacks to get the silicon working
[fleet.git]
/
src
/
com
/
sun
/
vlsi
/
chips
/
marina
/
test
/
Marina.java
diff --git
a/src/com/sun/vlsi/chips/marina/test/Marina.java
b/src/com/sun/vlsi/chips/marina/test/Marina.java
index
87a3c95
..
759662d
100644
(file)
--- a/
src/com/sun/vlsi/chips/marina/test/Marina.java
+++ b/
src/com/sun/vlsi/chips/marina/test/Marina.java
@@
-6,6
+6,7
@@
import com.sun.async.test.ChipModel;
import com.sun.async.test.JtagTester;
import com.sun.async.test.NanosimModel;
import com.sun.async.test.VerilogModel;
import com.sun.async.test.JtagTester;
import com.sun.async.test.NanosimModel;
import com.sun.async.test.VerilogModel;
+import com.sun.async.test.*;
import edu.berkeley.fleet.api.Instruction;
import edu.berkeley.fleet.marina.MarinaPath;
import edu.berkeley.fleet.api.Instruction;
import edu.berkeley.fleet.marina.MarinaPath;
@@
-268,10
+269,19
@@
public class Marina {
nModel.setNodeVoltage(MASTER_CLEAR,0.0);
nModel.waitNS(1);
} else {
nModel.setNodeVoltage(MASTER_CLEAR,0.0);
nModel.waitNS(1);
} else {
- prln("FIXME!");
+ mc0.setLogicState(true);
+ mc1.setLogicState(true);
+ model.waitNS(1000);
+ mc0.setLogicState(false);
+ mc1.setLogicState(false);
+ model.waitNS(1000);
}
resetAfterMasterClear();
}
}
resetAfterMasterClear();
}
+
+ JtagLogicLevel mc0;
+ JtagLogicLevel mc1;
+
private void resetAfterMasterClear() {
// The following call to ChainControl.resetInBits() is vital!
// If you forget, then the inBits member initializes
private void resetAfterMasterClear() {
// The following call to ChainControl.resetInBits() is vital!
// If you forget, then the inBits member initializes