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[fleet.git] / Makefile

diff --git a/Makefile b/Makefile
index a499f68..0a6cd9e 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -6,7 +6,7 @@ java              = java -Xmx500m
 
 run: fleet.jar; $(java) $(cp) $(interpreter_class)
 
-ifeq ($(shell uname -o),Cygwin)
+ifeq ($(shell uname -o 2>/dev/null),Cygwin)
 ps=\;
 else
 ps=:
@@ -25,7 +25,7 @@ fleet.jar: $(shell find src -name \*.java) $(shell find ships -name \*.ship) src
        cd build/class/; jar cmf manifest ../../$@ .
 
 
-## Slipway ####################################################################################
+## Fpga ####################################################################################
 
 #host = sting.eecs.berkeley.edu
 #remote_xilinx = /opt/ISE81/
@@ -35,11 +35,15 @@ host = intel2950-5.eecs.berkeley.edu
 remote_xilinx = /scratch/megacz/xilinx/
 remote_dir = /scratch/megacz/fleet/
 
+#host = cs61c-tb@ilinux1.eecs.berkeley.edu
+#remote_xilinx = /usr/local/xilinx/xilinx.ise.9.1-1607-8571-0259-2277
+#remote_dir = /home/tmp/cs61c-tb/fleet
+
 #host = mm2.millennium.berkeley.edu
 #remote_xilinx = /scratch/megacz/xilinx/
 #remote_dir = /scratch/megacz/fleet/
 
-xilinx =  cd build; 
+xilinx =  cd build/fpga;
 xilinx += LD_LIBRARY_PATH=$$LD_LIBRARY_PATH:$(XILINX)/bin/lin
 xilinx += XILINX=$(XILINX)
 xilinx += PATH=$$PATH:$(XILINX)/bin/lin
@@ -59,37 +63,39 @@ verilog_files += $(shell find src -name \*.inc)
 runfpga: fleet.jar
        $(java) -jar fleet.jar target=fpga run
 
-upload: fleet.jar build/main.bit
+upload: fleet.jar build/fpga/main.bit
        mkdir -p build
-       rsync -zare ssh --progress --verbose build/main.bit root@bee441.megacz.com:/var/slipway/megacz.bit
+       rsync -zare ssh --progress --verbose build/fpga/main.bit root@bee441.megacz.com:/var/slipway/megacz.bit
 
 uploadtest:
        make upload
-       $(java) -jar fleet.jar target=fpga bitfile=megacz.bit test tests
+       $(java) -jar fleet.jar target=fpga bitfile=megacz.bit test ships/*.ship tests
 testmegacz:
-       $(java) -jar fleet.jar target=fpga bitfile=megacz.bit test tests
+       $(java) -jar fleet.jar target=fpga bitfile=megacz.bit test ships/*.ship tests
 
-build/fabric.v: $(verilog_files) src/edu/berkeley/fleet/slipway/Slipway.java
+build/fpga/fabric.v: $(verilog_files) src/edu/berkeley/fleet/fpga/Fpga.java
        make fleet.jar
-       mkdir -p build
-       $(java) $(cp) edu.berkeley.fleet.slipway.Slipway > build/fabric.v
+       mkdir -p build/fpga
+       $(java) $(cp) edu.berkeley.fleet.fpga.Fpga > build/fpga/fabric.v
 
-build/main.bit: build/fabric.v $(verilog_files)
+build/fpga/main.bit: build/fpga/fabric.v $(verilog_files)
        make fleet.jar
+       cp src/edu/berkeley/fleet/fpga/* build/fpga
        for A in `find ships -name \*.ship`;\
          do java -cp build/class edu.berkeley.fleet.Main target=fpga expand $$A;\
          done
+       $(java) -cp fleet.jar edu.berkeley.fleet.fpga.Generator build/fpga/
        rsync -zare ssh --progress --delete --verbose ./ ${host}:${remote_dir}
-       ssh ${host} 'time make -C ${remote_dir} synth XILINX=${remote_xilinx}'
-       scp ${host}:${remote_dir}/build/main.bit build/
+       time ssh ${host} 'make -C ${remote_dir} synth XILINX=${remote_xilinx}'
+       scp ${host}:${remote_dir}/build/fpga/main.bit build/fpga/
 
 synth:
-       cd build; ln -sf ../src/edu/berkeley/fleet/slipway/* .
-       cd build; echo work > main.lso
-       cd build; for A in *.v; do echo verilog work \""$$A"\"; done > main.prj
-       cd build; mkdir -p tmp
-       cd build; mkdir -p xst
-       rm -rf build/_ngo
+       cd build/fpga; ln -sf ../src/edu/berkeley/fleet/fpga/* .
+       cd build/fpga; echo work > main.lso
+       cd build/fpga; for A in *.v; do echo verilog work \""$$A"\"; done > main.prj
+       cd build/fpga; mkdir -p tmp
+       cd build/fpga; mkdir -p xst
+       rm -rf build/fpga/_ngo
        $(xilinx)xst -intstyle xflow -ifn main.xst -ofn main.syr < main.xst
        $(xilinx)ngdbuild -intstyle xflow -dd _ngo -nt timestamp -uc main.ucf -p xc2vp70-ff1704-6 main.ngc main.ngd
        $(xilinx)map -intstyle xflow -p xc2vp70-ff1704-6 -cm speed -l -pr b -k 4 -c 100 -tx off -o main_map.ncd main.ngd main.pcf
@@ -98,17 +104,36 @@ synth:
 #      $(xilinx)trce -intstyle xflow -e 3 -l 3 -s 6 -xml main main.ncd -o main.twr main.pcf
 
 
-manual: fleet.jar
-       $(java) -jar fleet.jar doc
-       cd .tmp; TEXINPUTS=$$TEXINPUTS:../doc/ pdflatex *.tex
-       open .tmp/*.pdf
-
 
-test:     fleet.jar; $(java) -jar fleet.jar             test tests/
-testfpga: fleet.jar; $(java) -jar fleet.jar target=fpga test tests/
+test:     fleet.jar; $(java) -jar fleet.jar             test ships/*.ship tests
+testfpga: fleet.jar; $(java) -jar fleet.jar target=fpga test ships/*.ship tests
 
 generate: fleet.jar
-       $(java) -cp fleet.jar edu.berkeley.fleet.slipway.Generator
+       $(java) -cp fleet.jar edu.berkeley.fleet.fpga.Generator build/fpga/
+
+## Manual ####################################################################################
+
+svgs    = $(shell find doc -name \*.svg)
+%.eps: %.svg
+       DISPLAY= /Applications/Inkscape.app/Contents//Resources/bin/inkscape  -z --export-area-drawing $^ --export-eps=$@
+
+%.pdf: %.eps
+       epstopdf $^ --outfile=$@
+
+manual: archmanual toolmanual
+
+archmanual: fleet.jar $(svgs:%.svg=%.pdf)
+       $(java) -jar fleet.jar doc
+       cd .tmp; ln -sf ../doc/*.bib .
+       cd .tmp; TEXINPUTS=$$TEXINPUTS:../src/edu/berkeley/fleet/assembler/:../doc/ pdflatex FleetTwo.Manual.tex
+       cd .tmp; for A in *.mp; do mpost --tex=latex $$A; done
+       cd .tmp; TEXINPUTS=$$TEXINPUTS:../src/edu/berkeley/fleet/assembler/:../doc/ pdflatex FleetTwo.Manual.tex
+       open .tmp/FleetTwo.Manual.pdf
+toolmanual: fleet.jar $(svgs:%.svg=%.pdf)
+       $(java) -jar fleet.jar doc
+       cd .tmp; ln -sf ../doc/*.bib .
+       cd .tmp; TEXINPUTS=$$TEXINPUTS:../src/edu/berkeley/fleet/assembler/:../doc/ pdflatex toolchain.tex
+       open .tmp/toolchain.pdf
 
 ## API docs ####################################################################################