#xilinx += XST_VERSION=9.2i
xilinx += XILINX=$(remote_ise)
xilinx += XIL_XST_HIDEMESSAGES=hdl_and_low_levels
+xilinx += XIL_PAR_DESIGN_CHECK_VERBOSE=1
xilinx += XILINX_EDK=$(remote_edk)
xilinx_ise = $(xilinx) $(remote_ise)/bin/lin/
scp ${host}:${remote_dir}/build/fpga/main.bit build/fpga/
pcore = ${remote_edk}/hw/XilinxProcessorIPLib/pcores
+intstyle = -intstyle xflow
#effort = std
effort = high
+#opt_for = area
+opt_for = speed
synth:
cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/* .
cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/mem/* .
echo -n " -ofmt NGC" >> build/fpga/main.xst
echo -n " -p ${device}" >> build/fpga/main.xst
echo -n " -top main" >> build/fpga/main.xst
- echo -n " -opt_mode area" >> build/fpga/main.xst
+ echo -n " -opt_mode ${opt_for}" >> build/fpga/main.xst
echo -n " -opt_level 2" >> build/fpga/main.xst
echo -n " -iuc NO" >> build/fpga/main.xst
echo -n " -lso main.lso" >> build/fpga/main.xst
echo '-g Security:NONE' >> build/fpga/main.ut
echo '-g Persist:No' >> build/fpga/main.ut
- $(xilinx_ise)xst -intstyle xflow -ifn main.xst -ofn main.syr < main.xst
+ $(xilinx_ise)xst ${intstyle} -ifn main.xst -ofn main.syr < main.xst \
+ | grep --line-buffered -v 'been backward balanced into' \
+ | grep --line-buffered -v 'IDDR has been replaced by IDDR_2CLK' \
+ | grep --line-buffered -v 'WARNING:Xst:616 - Invalid property'
cat build/fpga/*.ucf > build/fpga/main.ucf
- $(xilinx_ise)ngdbuild -intstyle xflow -aul -dd _ngo -nt timestamp -uc main.ucf -p $(device) main.ngc main.ngd
- $(xilinx_ise)map -intstyle xflow -ol ${effort} -p $(device) -pr b -cm area -o main_map.ncd main.ngd main.pcf
- $(xilinx_ise)par -intstyle xflow -ol ${effort} -w main_map.ncd main.ncd main.pcf
- $(xilinx_ise)bitgen -intstyle xflow -f main.ut main.ncd
-# $(xilinx_ise)trce -intstyle xflow -e 3 -l 3 -s ${speed_grade} -xml main main.ncd -o main.twr main.pcf
+ $(xilinx_ise)ngdbuild ${intstyle} -aul -dd _ngo -nt timestamp -uc main.ucf -p $(device) main.ngc main.ngd
+ $(xilinx_ise)map ${intstyle} -ol ${effort} -p $(device) -pr b -cm ${opt_for} -o main_map.ncd main.ngd main.pcf
+ $(xilinx_ise)par ${intstyle} -pl high -ol ${effort} -w main_map.ncd main.ncd main.pcf
+ $(xilinx_ise)trce ${intstyle} -e 3 -l 3 -s ${speed_grade} -xml main main.ncd -o main.twr main.pcf
+ $(xilinx_ise)bitgen ${intstyle} -f main.ut main.ncd
# $(xilinx_edk)xmd -tcl $(remote_edk)/data/xmd/genace.tcl -jprog -hw main.bit -board ${board} -ace mainx.ace
# mv build/fpga/mainx.ace build/fpga/main.ace # genace throws a fit if the filename prefix is the same?
runtest: fleet.jar
rm lib/suncvs.jar; make lib/suncvs.jar
- rm -f suncvs/marina/testSims/isolatedInDock.spi.run
+ cp lib/suncvs.jar suncvs/marina/testCode/MarinaTest.jar
ssh ${sun_server} 'skill nanosim'
rsync -are ssh --delete --progress --verbose ./ ${sun_server}:~/fleet/
- ssh ${sun_server} 'export PATH=$$PATH:/proj/async/cad/linux/bin/; cd ~/fleet/suncvs/marina/testSims; ln -s ../testCode/marina.xml ../testCode/marina.spi ../testCode/cfg .; /proj/async/cad/linux/lib/jdk1.5.0_05-linux-i586/bin/java -cp $$HOME/fleet/fleet.jar:$$HOME/fleet/lib/suncvs.jar com.sun.vlsi.chips.marina.test.MarinaTest -testNum 3021'
+ ssh -Y ${sun_server} 'export PATH=/proj/async/cad/linux/bin/:$$PATH; cd ~/fleet/suncvs/marina/testCode; /proj/async/cad/linux/lib/jdk1.5.0_05-linux-i586/bin/java -cp $$HOME/fleet/lib/suncvs.jar com.sun.vlsi.chips.marina.test.MarinaTest -testNum 1006'
electric:
rsync -are ssh --progress --verbose ${sun_server}:fleet/suncvs/marina/testSims/marina.spi.out ~/marina.spi.out
- java -Xmx900m -jar /Applications/electric.jar suncvs/marina/electric/marinaL.jelib
+ java -Xmx900m -jar /Applications/electric.jar suncvs/marina/electric/aMarinaM.jelib
suncvs/test:
mkdir -p suncvs
mkdir -p suncvs
cd suncvs; cvs -d ${sun_server}:/import/async/cad/cvs co marina
+chaing: lib/suncvs.jar
+ java -cp lib/suncvs.jar com.sun.async.test.ChainG suncvs/marina/testCode/marina.xml
syncspi:
- rsync -are ssh --progress --verbose frehley:fleet/suncvs/marina/testSims/marina.spi.out ~/marina.spi.out
+ rsync -are ssh --progress --verbose frehley:fleet/suncvs/marina/testCode/marina.spi.out ~/marina.spi.out