adjust map+par flags in Makefile

[fleet.git] / Makefile

diff --git a/Makefile b/Makefile
index 8a61066..bd38909 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -71,17 +71,23 @@ build/fpga/main.bit: $(java_files) $(ship_files)
 pcore = ${remote_edk}/hw/XilinxProcessorIPLib/pcores
 synth:
        cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/* .
-       cd build/fpga; echo work > main.lso
-       cd build/fpga; for A in *.v; do echo verilog work \""$$A"\"; done > main.prj
+       cd build/fpga; ln -sf ../../src/edu/berkeley/fleet/fpga/mem/* .
+       rm -f build/fpga/main.lso
+       echo work                        >> build/fpga/main.lso
+       rm -f build/fpga/main.prj
+       cd build/fpga; for A in *.v;   do echo verilog work \""$$A"\"; done >> main.prj
+       cd build/fpga; for A in *.vhd; do echo vhdl    work \""$$A"\"; done >> main.prj
        cd build/fpga; mkdir -p tmp
        cd build/fpga; mkdir -p xst
        rm -rf build/fpga/_ngo
+       skill xst_original
        $(xilinx)xst -intstyle xflow -ifn main.xst -ofn main.syr < main.xst
        $(xilinx)ngdbuild -aul -intstyle xflow -dd _ngo -nt timestamp -uc main.ucf -p $(device) main.ngc main.ngd
-       $(xilinx)map -intstyle xflow -p $(device) -cm speed -l -pr b -k 4 -c 100 -tx off -o main_map.ncd main.ngd main.pcf
-       $(xilinx)par -w -intstyle xflow -pl std -ol std -t 99 main_map.ncd main.ncd main.pcf
+       $(xilinx)map -intstyle xflow -p $(device) -pr b -ol std -o main_map.ncd main.ngd main.pcf
+       $(xilinx)par -w -intstyle xflow -t 99 -pl std -rl std main_map.ncd main.ncd main.pcf
        $(xilinx)bitgen -intstyle xflow -d -f main.ut main.ncd
-#      $(xilinx)trce -intstyle xflow -e 3 -l 3 -s 6 -xml main main.ncd -o main.twr main.pcf
+#      $(xilinx)trce -intstyle xflow -e 3 -l 3 -s ${speed_grade} -xml main main.ncd -o main.twr main.pcf
+       $(xilinx)xmd -tcl $(remote_edk)/data/xmd/genace.tcl -jprog -hw main.bit -board ml410 -ace main.ace
 
 
 runserver: fleet.jar