%\pdfpagewidth 8.5in
%\pdfpageheight 11in
%\topmargin 0in
-%\textheight 7.5in
+\textheight 7.9in
%\textwidth 6.0in
%\oddsidemargin 0.25in
%\evensidemargin 0.25in
Changes:
\begin{tabular}{rl}
-\color{red}
+27-Aug
+& \color{red} Note that decision to requeue is based on value of OLC {\it before} execution\\
+10-Jul
+& Added {\tt OLC=0} predicate \\
+& Eliminated {\tt TAPL} (made possible by previous change) \\
+& Expanded {\tt set} {\tt Immediate} field from 13 bits to 14 bits (made possible by previous change)\\
+09-Jul
+& Fixed a few typos \\
+& Added {\tt DataLatch}\to{\tt TAPL} (Amir's request) \\
+& Eliminate ability to predicate directly on {\tt C}-flag (Ivan's request) \\
+16-Jun
+& When a torpedo strikes, {\tt ILC} is set to {\tt 1} \\
+& Only {\tt move} can be torpedoed (removed {\tt I}-bit from {\tt set}/{\tt shift}) \\
11-Jun
-& \color{red} XXX \\
+& Changed all uses of ``Payload'' to ``Immediate'' \color{black} (not in red) \\
+& Reworked encoding of {\tt set} instruction \\
\color{black}
06-Jun
& Factored in Russell Kao's comments (thanks!)\\
23-Apr
& added epilogue fifo to diagrams \\
& indicated that a token sent to the instruction port is treated as a torpedo \\
-18-Apr
-& replaced {\tt setInner}, {\tt setOuter}, {\tt setFlags} with unified {\tt set} instruction \\
-& replaced {\tt literal} with {\tt shift} instruction \\
-17-Apr
-& Made all instructions except {\tt setOuter} depend on {\tt OLC>0} \\
-& Removed ability to manually set the {\tt C} flag \\
-& Expanded predicate field to three bits \\
-& New literals scheme (via shifting) \\
-& Instruction encoding changes made at Ivan's request (for layout purposes) \\
-& Added summary of instruction encodings on last page \\
+%18-Apr
+%& replaced {\tt setInner}, {\tt setOuter}, {\tt setFlags} with unified {\tt set} instruction \\
+%& replaced {\tt literal} with {\tt shift} instruction \\
+%17-Apr
+%& Made all instructions except {\tt setOuter} depend on {\tt OLC>0} \\
+%& Removed ability to manually set the {\tt C} flag \\
+%& Expanded predicate field to three bits \\
+%& New literals scheme (via shifting) \\
+%& Instruction encoding changes made at Ivan's request (for layout purposes) \\
+%& Added summary of instruction encodings on last page \\
%07-Apr
%& removed ``+'' from ``potentially torpedoable'' row where it does not occur in Execute \\
%06-Apr
\begin{center}
\epsfig{file=overview-new,width=2.5in}\\
-{\it Overview of a Fleet processor; gray shading represents the switch
- fabric; docks are shown in blue.}
+{\it Overview of a Fleet processor; dark gray shading represents the
+ switch fabric, ships are shown in light gray, and docks are shown in blue.}
\end{center}
\color{black}
When a torpedo arrives at the tail of {\tt EF}, it is deposited in a
waiting area (not shown) rather than being enqueued into {\tt EF}.
-There is a latch (not shown) called the {\it torpedo acknowledgment path
- latch} ({\tt TAPL}) which stores a path. When a torpedo is consumed
-(see section ``On Deck''), a token is sent along the path held in this
-latch.
-
\subsection{Format of an Instruction}
All instruction words have the following format:
\bitbox{1}{OS}
\bitbox{3}{P}
}
+\newcommand{\bitsHeaderNoI}{
+ \bitbox{1}{}
+ \bitbox{1}{OS}
+ \bitbox{3}{P}
+}
\setlength{\bitwidth}{3.5mm}
{\tt \footnotesize
\begin{itemize}
\item The {\tt I} bit stands for {\tt Interruptible}, and indicates if an
-instruction is vulnerable to torpedoes.
+instruction is vulnerable to torpedoes. This bit only appears in {\tt move} instructions.
\item The {\tt OS} (``One Shot'') bit indicates whether or not this
instruction can pass through the pump more than once. If set to
{\tt 001:} & {\tt OLC$\neq$0} & and {\tt A=1} \\
{\tt 010:} & {\tt OLC$\neq$0} & and {\tt B=0} \\
{\tt 011:} & {\tt OLC$\neq$0} & and {\tt B=1} \\
-{\tt 100:} & {\tt OLC$\neq$0} & and {\tt C=0} \\
-{\tt 101:} & {\tt OLC$\neq$0} & and {\tt C=1} \\
+{\tt 100:} & Unused & \\
+{\tt 101:} & {\tt OLC=0} & \\
{\tt 110:} & {\tt OLC$\neq$0} & \\
{\tt 111:} & always & \\
\hline\end{tabular}
\item Requeueing:
\begin{itemize}
- \item If the outer loop counter is zero ({\tt OLC=0}) or the
- instruction on deck is a one-shot instruction ({\tt
- OS=1}), do nothing.
+ \item If the outer loop counter is zero ({\tt OLC=0})
+ \color{red}{\it before executing the
+ instruction}\color{black}\ or the instruction on deck is a
+ one-shot instruction ({\tt OS=1}), do nothing.
\item {\it Otherwise} wait for the hatch to be sealed and
enqueue a copy of the instruction currently on deck.
\end{itemize}
{\it Otherwise} if the instruction is interruptible ({\tt I=0})
and a torpedo is present in the waiting area: consume the
torpedo, set the outer loop counter to zero ({\tt OLC=0}),
- unseal the hatch, and transmit a token along in the
- {\it torpedo acknowledgment path latch} ({\tt TAPL}).
+ set the inner loop counter to one ({\tt ILC=1}),
+ unseal the hatch.
\item
{\it Otherwise} if {\tt ILC$\neq$0} or the instruction is {\it
\pagebreak
\section{Instructions}
-The dock supports for instructions:
+The dock supports four instructions:
{\tt move} (variants: {\tt moveto}, {\tt dispatch}),
{\tt shift},
{\tt set}, and
\begin{bytefield}{26}
\bitheader[b]{0,12,13}\\
- \bitbox[1]{11}{\raggedleft {\tt moveto} ({\tt Payload\to Path})}
+ \bitbox[1]{11}{\raggedleft {\tt moveto} ({\tt Immediate\to Path})}
\bitbox[r]{1}{}
\bitbox{1}{\tt 1}
- \bitbox{13}{\tt Payload}
+ \bitbox{13}{\tt Immediate}
\end{bytefield}
\begin{bytefield}{26}
\setlength{\bitwidth}{5mm}
{\tt
\begin{bytefield}{26}
- \bitheader[b]{0,13-15,16-20}\\
-\color{light}
- \bitsHeader
-\color{black}
+ \bitheader[b]{19-25}\\
+ \bitsHeaderNoI
\bitbox{1}{1}
\bitbox{1}{0}
- \bitbox{2}{SRC}
- \bitbox{3}{DST}
- \bitbox{14}{Payload}
+\color{light}
+ \bitbox{5}{Dest}
+ \bitbox{14}{}
\color{black}
\end{bytefield}}
+
+\begin{bytefield}{26}
+ \bitheader[b]{0,5,12-18}\\
+ \bitbox[1]{6}{\raggedleft {\tt Immediate}\to{\tt OLC}}
+ \bitbox[r]{1}{}
+ \bitbox{4}{\tt 1000\color{black}}
+ \bitbox{3}{\tt 100}
+ \bitbox{6}{}
+ \bitbox{6}{\tt Immediate}
+\end{bytefield}
+
+\begin{bytefield}{26}
+ \bitheader[b]{12-18}\\
+ \bitbox[1]{6}{\raggedleft {\tt Data Latch}\to{\tt OLC}}
+ \bitbox[r]{1}{}
+ \bitbox{4}{\tt 1000\color{black}}
+ \bitbox{3}{\tt 010}
+ \bitbox{12}{}
+\end{bytefield}
+
+\begin{bytefield}{26}
+ \bitheader[b]{12-18}\\
+ \bitbox[1]{6}{\raggedleft {\tt OLC-1}\to{\tt OLC}}
+ \bitbox[r]{1}{}
+ \bitbox{4}{\tt 1000\color{black}}
+ \bitbox{3}{\tt 001}
+ \bitbox{12}{}
+\end{bytefield}
+
+\begin{bytefield}{26}
+ \bitheader[b]{0,5,6,12-18}\\
+ \bitbox[1]{6}{\raggedleft {\tt Immediate}\to{\tt ILC}}
+ \bitbox[r]{1}{}
+ \bitbox{4}{\tt 0100\color{black}}
+ \bitbox{3}{\tt 100}
+ \bitbox{5}{}
+ \bitbox{1}{\tt 0}
+ \bitbox{6}{\tt Immediate}
+\end{bytefield}
+
+\begin{bytefield}{26}
+ \bitheader[b]{6,12-18}\\
+ \bitbox[1]{6}{\raggedleft $\infty$\to{\tt ILC}}
+ \bitbox[r]{1}{}
+ \bitbox{4}{\tt 0100\color{black}}
+ \bitbox{3}{\tt 100}
+ \bitbox{5}{}
+ \bitbox{1}{\tt 1}
+ \bitbox{6}{}
+\end{bytefield}
+
+\begin{bytefield}{26}
+ \bitheader[b]{12-18}\\
+ \bitbox[1]{6}{\raggedleft {\tt Data Latch}\to{\tt ILC}}
+ \bitbox[r]{1}{}
+ \bitbox{4}{\tt 0100\color{black}}
+ \bitbox{3}{\tt 010}
+ \bitbox{12}{}
+\end{bytefield}
+
+\begin{bytefield}{26}
+ \bitheader[b]{0,13-18}\\
+ \bitbox[1]{6}{\raggedleft \footnotesize {\tt 0-Extended Immediate}\to{\tt Data Latch}}
+ \bitbox[r]{1}{}
+ \bitbox{4}{\tt 0010\color{black}}
+ \bitbox{1}{\tt 0}
+ \bitbox{14}{\tt Immediate}
+\end{bytefield}
+
+\begin{bytefield}{26}
+ \bitheader[b]{0,13-18}\\
+ \bitbox[1]{6}{\raggedleft \footnotesize {\tt 1-Extended Immediate}\to{\tt Data Latch}}
+ \bitbox[r]{1}{}
+ \bitbox{4}{\tt 0010\color{black}}
+ \bitbox{1}{\tt 1}
+ \bitbox{14}{\tt Immediate}
+\end{bytefield}
+
+\begin{bytefield}{26}
+ \bitheader[b]{0,5,6,11,15-18}\\
+ \bitbox[1]{6}{\raggedleft {\tt Update Flags}}
+ \bitbox[r]{1}{}
+ \bitbox{4}{\tt 0001\color{black}}
+ \bitbox{3}{}
+ \bitbox{6}{\tt nextA}
+ \bitbox{6}{\tt nextB}
+\end{bytefield}
+
+
+\color{black}
+
}
\bitsSet
-\begin{center}{\tt
-\begin{tabular}{|r|r|l|l|}\hline
-Source & SRC & DST & Destination \\\hline
-\hline
-Payload & 00 & 000 & OLC \\
-Data Latch & 01 & 000 & OLC \\
-OLC-1 & 10 & 000 & OLC \\
-Payload & 00 & 001 & ILC \\
-Data Latch & 01 & 001 & ILC \\
-$\infty$ & 10 & 001 & ILC \\
-Payload & 00 & 010 & TAPL \\
-Payload, 0-extend & 01 & 100 & Data Latch \\
-Payload, 1-extend & 10 & 100 & Data Latch \\
- see below & & 111 & Flags \\
-\hline
-\end{tabular}
-}\end{center}
-
The FleetTwo implementation is likely to have an unarchitected
``literal latch'' at the on deck ({\tt OD}) stage, which is loaded
with the possibly-extended literal {\it at the time that the {\tt set}
latch when a {\tt set Data Latch} instruction
executes\color{black}.
-If the {\tt Dest} field is {\tt flags}, the {\tt Payload} field is
-interpreted as two fields, each giving the truth table for the new
-value of one of the two user-settable flags:
-
-\begin{center}
-\setlength{\bitwidth}{5mm}
-{\tt
-\begin{bytefield}{26}
- \bitheader[b]{0,5,6,11}\\
-\color{light}
- \bitsHeader
- \bitbox{1}{1}
- \bitbox{1}{0}
-\color{light}
- \bitbox{2}{}
-\color{black}
- \bitbox{3}{111}
-\color{light}
- \bitbox{2}{}
-\color{black}
- \bitbox{6}{nextA}
- \bitbox{6}{nextB}
-\end{bytefield}}
-\end{center}
-\color{black}
-Each field has the following structure, and indicates which old flag
-values should be logically {\tt OR}ed together to produce the new flag
-value:
+Each of the {\tt nextA} and {\tt nextB} fields has the following
+structure, and indicates which old flag values should be logically
+{\tt OR}ed together to produce the new flag value:
\begin{center}
{\tt
\pagebreak
\subsection{{\tt shift}}
-\newcommand{\shiftPayloadSize}{19}
+\newcommand{\shiftImmediateSize}{19}
-Each {\tt shift} instruction carries a payload of \shiftPayloadSize\
-bits. When a {\tt shift} instruction is executed, this payload is copied
-into the least significant \shiftPayloadSize\ bits of the data latch,
+Each {\tt shift} instruction carries an immediate of \shiftImmediateSize\
+bits. When a {\tt shift} instruction is executed, this immediate is copied
+into the least significant \shiftImmediateSize\ bits of the data latch,
and the remaining most significant bits of the data latch are loaded
with the value formerly in the least significant bits of the data latch.
In this manner, large literals can be built up by ``shifting'' them
-into the data latch \shiftPayloadSize\ bits at a time.
+into the data latch \shiftImmediateSize\ bits at a time.
\newcommand{\bitsShift}{
\setlength{\bitwidth}{5mm}
\begin{bytefield}{26}
\bitheader[b]{0,18-20}\\
\color{light}
- \bitsHeader
+ \bitsHeaderNoI
\color{black}
\bitbox{1}{0}
\bitbox{1}{0}
\color{black}
- \bitbox{\shiftPayloadSize}{Payload}
+ \bitbox{\shiftImmediateSize}{Immediate}
\end{bytefield}}
}
\bitsShift
projects / fleet.git / blobdiff