migrate jelib->delib
[fleet.git] / chips / marina / electric / basic.jelib
diff --git a/chips/marina/electric/basic.jelib b/chips/marina/electric/basic.jelib
deleted file mode 100644 (file)
index a46de29..0000000
+++ /dev/null
@@ -1,85 +0,0 @@
-# header information:
-Hbasic|8.07c
-
-# Views:
-Vicon|ic
-Vschematic|sch
-
-# Tools:
-Oio|GDSOutputConvertsBracketsInExports()BF|GDSWritesExportPins()BT
-
-# Technologies:
-Tcmos|ScaleFORcmos()D1000.0
-Tmocmos|ScaleFORmocmos()D100.0|SelectedFoundryFormocmos()STSMC
-Trcmos|ScaleFORrcmos()D1000.0
-
-# Cell iopin;1{ic}
-Ciopin;1{ic}||artwork|1201830579034|1201830708186|E
-Ngeneric:Facet-Center|art@0||0|0||||AV
-NClosed-Polygon|art@1||-0.25|0|1.5|0.9|||trace()V[0.75/0,0.3/0.45,-0.3/0.45,-0.75/0,-0.3/-0.45,0.3/-0.45]
-X
-
-# Cell ipin;1{ic}
-Cipin;1{ic}||artwork|1201830579042|1201830708186|E
-Ngeneric:Facet-Center|art@0||0|0||||AV
-NClosed-Polygon|art@1||-0.5|0|1|0.9|||trace()V[-0.5/-0.45,-0.5/0.45,0.05/0.45,0.5/0,0.05/-0.45]
-X
-
-# Cell noConn;1{ic}
-CnoConn;1{ic}||artwork|1201830579045|1201830708186|E
-Ngeneric:Facet-Center|art@0||0|0||||AV
-NOpened-Polygon|art@1||0|-0.75||1.5|||trace()V[0/0.75,0/-0.75,0/-0.75]
-NBox|art@2||0|-2|1|1||
-NOpened-Polygon|art@3||0|-2|1|1|||trace()V[0.5/0.5,-0.5/-0.5,-0.5/-0.5]
-NOpened-Polygon|art@4||0|-2|1|1|||trace()V[-0.5/0.5,0.5/-0.5,0.5/-0.5]
-NBox|art@5||0|0|0.4|0.4||
-Nschematic:Bus_Pin|pin@0||0|0||||
-EnoConn||D5G2;|pin@0||B
-X
-
-# Cell noConn;1{sch}
-CnoConn;1{sch}||schematic|1201830579044|1201830708186|
-Ngeneric:Facet-Center|art@0||0|0||||AV
-NOff-Page|conn@0||6|-2.5||||
-EnoConn||D5G2;|conn@0|y|B
-X
-
-# Cell opin;1{ic}
-Copin;1{ic}||artwork|1201830579047|1201830708186|E
-Ngeneric:Facet-Center|art@0||0|0||||AV
-NClosed-Polygon|art@1||0.5|0|1|0.9|||trace()V[-0.5/-0.45,-0.5/0.45,0.05/0.45,0.5/0,0.05/-0.45]
-X
-
-# Cell patch;1{ic}
-Cpatch;1{ic}||artwork|1201830579050|1201830708186|E
-Ngeneric:Facet-Center|art@0||0|0||||AV
-NOpened-Polygon|art@1||-0.5|0.275|0.6|0.15|||trace()V[-0.3/-0.075,-0.2/0.025,0/0.075,0.2/0.025,0.3/-0.075,0.3/-0.025,0.25/-0.075,0.3/-0.075]
-NBox|art@2||-1|0|0.4|0.4||
-NBox|art@3||0|0|0.4|0.4||
-NBox|art@4||-1|0|0.4|0.4||
-NBox|art@5||0|0|0.4|0.4||
-Nschematic:Bus_Pin|pin@0||-1|0||||
-Nschematic:Bus_Pin|pin@1||0|0||||
-Edst||D5G2;|pin@1||I
-Esrc||D5G2;|pin@0||I
-X
-
-# Cell patch;1{sch}
-Cpatch;1{sch}||schematic|1201830579048|1201831981422|
-Ngeneric:Facet-Center|art@0||0|0||||AV
-Nartwork:Box|art@1||0|0|0.2|0.2||
-Nartwork:Box|art@2||-1|0|0.2|0.2||
-NOff-Page|conn@0||7|-1||||
-NOff-Page|conn@1||7|4||||
-NGlobal-Signal|conn@2||2|1.5||||
-NBus_Pin|pin@0||0|0||||
-NBus_Pin|pin@1||-1|0||||
-NWire_Pin|pin@2||2|-1||||
-NWire_Pin|pin@3||2|4||||
-Awire|net@0|||900|conn@2||2|0|pin@2||2|-1
-Awire|net@1|||1800|pin@2||2|-1|conn@0|a|5|-1
-Awire|net@2|||0|conn@1|a|5|4|pin@3||2|4
-Awire|net@3|||900|pin@3||2|4|conn@2||2|0
-Edst||D5G2;|conn@1|y|I
-Esrc||D5G2;|conn@0|y|I
-X