migrate jelib->delib

[fleet.git] / chips / marina / electric / coversM.delib / cover2h.lay

diff --git a/chips/marina/electric/coversM.delib/cover2h.lay b/chips/marina/electric/coversM.delib/cover2h.lay
new file mode 100644 (file)
index 0000000..7d6d042
--- /dev/null
+++ b/chips/marina/electric/coversM.delib/cover2h.lay
@@ -0,0 +1,103 @@
+HcoversM|8.10k
+
+# Cell cover2h;2{lay}
+Ccover2h;2{lay}||cmos90|1237815685733|1241981698008||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241982205540
+Ngeneric:Facet-Center|art@0||0|0||||AV
+Icover1h;2{lay}|cover1h@4||0|72|||D5G4;
+Icover1h;2{lay}|cover1h@5||0|-72|||D5G4;
+Ametal-3|net@36|||S900|cover1h@5|vdd_8|-1584|0|cover1h@4|vdd_9|-1584|0
+Ametal-3|net@37|||S900|cover1h@4|gnd_5|-1728|0|cover1h@5|gnd_4|-1728|0
+Ametal-3|net@38|||S900|cover1h@4|gnd_3|0|0|cover1h@5|gnd_2|0|0
+Ametal-3|net@39|||S900|cover1h@4|gnd_8|-1440|0|cover1h@5|gnd_7|-1440|0
+Ametal-3|net@40|||S900|cover1h@4|gnd_10|-1152|0|cover1h@5|gnd_9|-1152|0
+Ametal-3|net@41|||S900|cover1h@4|gnd_12|-864|0|cover1h@5|gnd_11|-864|0
+Ametal-3|net@42|||S900|cover1h@4|gnd_16|-288|0|cover1h@5|gnd_15|-288|0
+Ametal-3|net@43|||S900|cover1h@4|gnd_18|288|0|cover1h@5|gnd_17|288|0
+Ametal-3|net@44|||S900|cover1h@4|gnd_20|576|0|cover1h@5|gnd_19|576|0
+Ametal-3|net@45|||S900|cover1h@4|gnd_22|864|0|cover1h@5|gnd_21|864|0
+Ametal-3|net@46|||S900|cover1h@4|gnd_24|1152|0|cover1h@5|gnd_23|1152|0
+Ametal-3|net@47|||S900|cover1h@4|gnd_26|1440|0|cover1h@5|gnd_25|1440|0
+Ametal-3|net@48|||S900|cover1h@4|gnd_28|1728|0|cover1h@5|gnd_27|1728|0
+Ametal-3|net@49|||S900|cover1h@4|vdd_7|144|0|cover1h@5|vdd_6|144|0
+Ametal-3|net@50|||S900|cover1h@4|vdd_11|-1296|0|cover1h@5|vdd_10|-1296|0
+Ametal-3|net@51|||S900|cover1h@4|vdd_13|-1008|0|cover1h@5|vdd_12|-1008|0
+Ametal-3|net@52|||S900|cover1h@4|vdd_15|-720|0|cover1h@5|vdd_14|-720|0
+Ametal-3|net@53|||S900|cover1h@4|vdd_17|-432|0|cover1h@5|vdd_16|-432|0
+Ametal-3|net@54|||S900|cover1h@4|vdd_19|-144|0|cover1h@5|vdd_18|-144|0
+Ametal-3|net@55|||S900|cover1h@4|vdd_21|432|0|cover1h@5|vdd_20|432|0
+Ametal-3|net@56|||S900|cover1h@4|vdd_23|720|0|cover1h@5|vdd_22|720|0
+Ametal-3|net@57|||S900|cover1h@4|vdd_25|1008|0|cover1h@5|vdd_24|1008|0
+Ametal-3|net@58|||S900|cover1h@4|vdd_29|1584|0|cover1h@5|vdd_28|1584|0
+Ametal-3|net@152|||S900|cover1h@4|gnd_14|-576|0|cover1h@5|gnd_13|-576|0
+Ametal-3|net@153|||S900|cover1h@4|vdd_27|1296|0|cover1h@5|vdd_26|1296|0
+Egnd||D5G7;|cover1h@4|gnd_6|G
+Egnd_1||D5G7;|cover1h@4|gnd_1|G
+Egnd_3||D5G7;|cover1h@5|gnd_5|G
+Egnd_4||D5G7;|cover1h@4|gnd_4|G
+Egnd_5||D5G7;|cover1h@4|gnd_2|G
+Egnd_6||D5G7;|cover1h@5|gnd_3|G
+Egnd_7||D5G7;|cover1h@4|gnd_7|G
+Egnd_8||D5G7;|cover1h@5|gnd_8|G
+Egnd_9||D5G7;|cover1h@4|gnd_9|G
+Egnd_10||D5G7;|cover1h@5|gnd_10|G
+Egnd_11||D5G7;|cover1h@4|gnd_11|G
+Egnd_12||D5G7;|cover1h@5|gnd_12|G
+Egnd_13||D5G7;|cover1h@4|gnd_13|G
+Egnd_14||D5G7;|cover1h@5|gnd_14|G
+Egnd_15||D5G7;|cover1h@4|gnd_15|G
+Egnd_16||D5G7;|cover1h@5|gnd_16|G
+Egnd_17||D5G7;|cover1h@4|gnd_17|G
+Egnd_18||D5G7;|cover1h@5|gnd_18|G
+Egnd_19||D5G7;|cover1h@4|gnd_19|G
+Egnd_20||D5G7;|cover1h@5|gnd_20|G
+Egnd_21||D5G7;|cover1h@4|gnd_21|G
+Egnd_22||D5G7;|cover1h@5|gnd_22|G
+Egnd_23||D5G7;|cover1h@4|gnd_23|G
+Egnd_24||D5G7;|cover1h@5|gnd_24|G
+Egnd_25||D5G7;|cover1h@4|gnd_25|G
+Egnd_26||D5G7;|cover1h@5|gnd_26|G
+Egnd_27||D5G7;|cover1h@4|gnd_27|G
+Egnd_28||D5G7;|cover1h@5|gnd_28|G
+Egnd_29||D5G7;|cover1h@4|gnd_29|G
+Egnd_30||D5G7;|cover1h@4|gnd|G
+Egnd_39||D5G7;|cover1h@5|gnd_6|G
+Egnd_40||D5G7;|cover1h@5|gnd_1|G
+Egnd_41||D5G7;|cover1h@5|gnd_29|G
+Egnd_42||D5G7;|cover1h@5|gnd|G
+Evdd||D5G7;|cover1h@4|vdd_2|P
+Evdd_1||D5G7;|cover1h@4|vdd_1|P
+Evdd_3||D5G7;|cover1h@4|vdd_3|P
+Evdd_4||D5G7;|cover1h@4|vdd_6|P
+Evdd_5||D5G7;|cover1h@5|vdd_7|P
+Evdd_6||D5G7;|cover1h@4|vdd_8|P
+Evdd_7||D5G7;|cover1h@5|vdd_9|P
+Evdd_8||D5G7;|cover1h@4|vdd_10|P
+Evdd_9||D5G7;|cover1h@5|vdd_11|P
+Evdd_10||D5G7;|cover1h@4|vdd_12|P
+Evdd_11||D5G7;|cover1h@5|vdd_13|P
+Evdd_12||D5G7;|cover1h@4|vdd_14|P
+Evdd_13||D5G7;|cover1h@5|vdd_15|P
+Evdd_14||D5G7;|cover1h@4|vdd_16|P
+Evdd_15||D5G7;|cover1h@5|vdd_17|P
+Evdd_16||D5G7;|cover1h@4|vdd_18|P
+Evdd_17||D5G7;|cover1h@5|vdd_19|P
+Evdd_18||D5G7;|cover1h@4|vdd_20|P
+Evdd_19||D5G7;|cover1h@5|vdd_21|P
+Evdd_20||D5G7;|cover1h@4|vdd_22|P
+Evdd_21||D5G7;|cover1h@5|vdd_23|P
+Evdd_22||D5G7;|cover1h@4|vdd_24|P
+Evdd_23||D5G7;|cover1h@5|vdd_25|P
+Evdd_24||D5G7;|cover1h@4|vdd_26|P
+Evdd_25||D5G7;|cover1h@5|vdd_27|P
+Evdd_26||D5G7;|cover1h@4|vdd_28|P
+Evdd_30||D5G7;|cover1h@4|vdd|P
+Evdd_43||D5G7;|cover1h@5|vdd_2|P
+Evdd_44||D5G7;|cover1h@5|vdd_1|P
+Evdd_45||D5G7;|cover1h@5|vdd_3|P
+Evdd_47||D5G7;|cover1h@5|vdd_29|P
+Evdd_48||D5G7;|cover1h@5|vdd|P
+Evdd_49||D5G7;|cover1h@5|vdd_4|P
+Evdd_50||D5G7;|cover1h@5|vdd_5|P
+Evdd_51||D5G7;|cover1h@4|vdd_4|P
+Evdd_52||D5G7;|cover1h@4|vdd_5|P
+X