migrate jelib->delib

[fleet.git] / chips / marina / electric / driversM.delib / pred20wMC.lay

diff --git a/chips/marina/electric/driversM.delib/pred20wMC.lay b/chips/marina/electric/driversM.delib/pred20wMC.lay
new file mode 100644 (file)
index 0000000..d7fa7b8
--- /dev/null
+++ b/chips/marina/electric/driversM.delib/pred20wMC.lay
@@ -0,0 +1,119 @@
+HdriversM|8.10k
+
+# External Libraries:
+
+LwiresL|wiresL
+
+# Cell pred20wMC;1{lay}
+Cpred20wMC;1{lay}||cmos90|1228304833003|1238257435226||ATTR_NCC(D5G3;NTY70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NMetal-1-P-Active-Con|contact@0||11.5|44||5.2||
+NMetal-1-N-Active-Con|contact@1||7.5|0||20.8||
+NMetal-1-P-Active-Con|contact@2||-8.5|44||5.2||
+NMetal-1-N-Active-Con|contact@3||-0.5|0||20.8||
+NMetal-1-N-Active-Con|contact@4||-8.5|0||20.8||
+NMetal-1-P-Active-Con|contact@5||16.5|-44||5.2||
+NMetal-1-N-Active-Con|contact@6||16.5|-9||5.2||
+NMetal-1-Polysilicon-Con|contact@10||12|54.5||5.2|R|
+NX-Metal-1-Metal-2-Con|contact@14||-8.5|0||6.2||
+NX-Metal-1-Metal-2-Con|contact@15||7.5|0||6.2||
+NX-Metal-1-Metal-2-Con|contact@18||-8.5|50||6.2||
+NMetal-1-P-Active-Con|contact@19||8.5|-44||5.2||
+NMetal-1-Polysilicon-Con|contact@20||11|-28||5.2||
+NMetal-1-Polysilicon-Con|contact@21||-12.5|-22.5||5.2||
+NX-Metal-1-Metal-2-Con|contact@25||8.5|-50||6.2||
+NMetal-1-N-Active-Con|contact@26||-16.5|0||20.8||
+NMetal-1-Polysilicon-Con|contact@27||-0.5|25||5.2|R|
+NN-Transistor|nmos@0||3.5|0||26||
+NN-Transistor|nmos@1||-4.5|0||26||
+NN-Transistor|nmos@3||12.5|-9||8||
+NN-Transistor|nmos@4||-12.5|0||26||
+NMetal-1-Pin|pin@28||-12.5|-21||||
+NMetal-1-Pin|pin@30||-0.5|25||||
+NPolysilicon-Pin|pin@32||12.5|-30.6||||
+NMetal-1-Pin|pin@33||-0.5|-25.4||||
+NMetal-1-Pin|pin@37||17|54.5||||
+NMetal-1-Pin|pin@40||17|-6.4||||
+NMetal-1-Pin|pin@43||11.5|16.5||||
+NMetal-1-Pin|pin@46||-0.5|16.5||||
+NPolysilicon-Pin|pin@47||-12.5|35||||
+NPolysilicon-Pin|pin@48||-4.5|25||||
+NPolysilicon-Pin|pin@49||3.5|25||||
+NPolysilicon-Pin|pin@50||2.1|26.6||||
+NMetal-1-Pin|pin@51||-16.5|16.5||||
+NPolysilicon-Pin|pin@52||7.5|54.5||||
+IwiresL:pinsVddGnd;1{lay}|pinsVddG@0||-21|0|||D5G4;
+IwiresL:pinsVddGnd;1{lay}|pinsVddG@1||21|0|||D5G4;
+NP-Well-Node|plnode@0||0|0|47|48||A
+NN-Well-Node|plnode@1||0|-50|47|52||A
+NN-Well-Node|plnode@2||0|50|47|52||A
+NP-Select-Node|plnode@3||0|-50|44|52||A
+NP-Select-Node|plnode@4||0|50|44|52||A
+NN-Select-Node|plnode@5||0|0|44|48||A
+NP-Transistor|pmos@0||7.5|44||8||
+NP-Transistor|pmos@1||1.5|44||8||
+NP-Transistor|pmos@2||-4.5|44||8||
+NP-Transistor|pmos@4||12.5|-44||8||
+AN-Active|net@0|||RS0|contact@1||7.5|0|nmos@0|diff-right|6.3|0
+AN-Active|net@1|||RS1800|contact@3||-0.5|0|nmos@0|diff-left|0.7|0
+AN-Active|net@2|||RS0|contact@3||-0.5|0|nmos@1|diff-right|-1.7|0
+AN-Active|net@3|||RS1800|contact@4||-8.5|0|nmos@1|diff-left|-7.3|0
+AN-Active|net@5|||RS0|contact@6||16.5|-9|nmos@3|diff-right|15.3|-9
+AP-Active|net@6|||RS0|contact@0||11.5|44|pmos@0|diff-right|10.3|44
+AP-Active|net@7|||RS1800|contact@2||-8.5|44|pmos@2|diff-left|-7.3|44
+AP-Active|net@10|||RS1800|pmos@2|diff-right|-1.7|44|pmos@1|diff-left|-1.3|44
+AP-Active|net@11|||RS1800|pmos@1|diff-right|4.3|44|pmos@0|diff-left|4.7|44
+Ametal-2|net@62||6.2|S0|pinsVddG@1|gnd|21|0|contact@15||7.5|0
+Ametal-2|net@63||6.2|S0|contact@25||8.5|-50|pinsVddG@0|vdd_1|-21|-50
+Ametal-2|net@66||6.2|S0|contact@14||-8.5|0|pinsVddG@0|gnd|-21|0
+Ametal-1|net@67|||S0|contact@4||-8.5|0|contact@14||-8.5|0
+Ametal-2|net@68||6.2|S0|contact@15||7.5|0|contact@14||-8.5|0
+Ametal-1|net@69|||S0|contact@1||7.5|0|contact@15||7.5|0
+Ametal-1|net@87|||S2700|contact@5||16.5|-45.2|contact@6||16.5|-8
+Ametal-2|net@92||6.2|S1800|contact@18||-8.5|50|pinsVddG@1|vdd|21|50
+Ametal-2|net@93||6.2|S1800|pinsVddG@0|vdd|-21|50|contact@18||-8.5|50
+Ametal-1|net@94|||S2700|contact@2||-8.5|46.6|contact@18||-8.5|50
+AN-Active|net@95|||RS1800|contact@1||7.5|-4.5|nmos@3|diff-left|9.7|-4.5
+AP-Active|net@96|||RS1800|contact@19||8.5|-44|pmos@4|diff-left|9.7|-44
+AP-Active|net@97|||RS0|contact@5||16.5|-44|pmos@4|diff-right|15.3|-44
+APolysilicon|net@98|||S900|nmos@3|poly-bottom|12.5|-18|pin@32||12.5|-30.6
+APolysilicon|net@99|||S900|pin@32||12.5|-30.6|pmos@4|poly-top|12.5|-35
+APolysilicon|net@100|||S1800|contact@20||11|-30.6|pin@32||12.5|-30.6
+Ametal-1|net@101|||S900|contact@3||-0.5|-10.4|pin@33||-0.5|-25.4
+Ametal-1|net@102|||S1800|pin@33||-0.5|-25.4|contact@20||11|-25.4
+Ametal-1|net@105|||S900|pin@28||-12.5|-21|contact@21||-12.5|-21
+Ametal-1|net@113|||S0|pin@37||17|54.5|contact@10||9.6|54.5
+Ametal-2|net@118||6.2|S0|pinsVddG@1|vdd_1|21|-50|contact@25||8.5|-50
+Ametal-1|net@119|||S900|contact@19||8.5|-46.6|contact@25||8.5|-50
+Ametal-1|net@120|||S900|pin@37||17|54.5|pin@40||17|-6.4
+Ametal-1|net@121|||S0|pin@40||17|-6.4|contact@6||16.5|-6.4
+Ametal-1|net@132|||S1800|pin@46||-0.5|16.5|pin@43||11.5|16.5
+Ametal-1|net@133|||S900|contact@0||11.5|41.4|pin@43||11.5|16.5
+AN-Active|net@134|||RS0|nmos@1|diff-left|-7.3|0|nmos@4|diff-right|-9.7|0
+AN-Active|net@135|||RS1800|contact@26||-16.5|0|nmos@4|diff-left|-15.3|0
+APolysilicon|net@137|||S0|pmos@2|poly-bottom|-4.5|35|pin@47||-12.5|35
+APolysilicon|net@138|||S900|pin@47||-12.5|35|nmos@4|poly-top|-12.5|18
+Ametal-1|net@139|||S0|pin@30||-0.5|25|contact@27||-0.5|25
+APolysilicon|net@140|||S2700|nmos@1|poly-top|-4.5|18|pin@48||-4.5|25
+APolysilicon|net@141|||S1800|pin@48||-4.5|25|contact@27||-3.1|25
+APolysilicon|net@142|||S2700|nmos@0|poly-top|3.5|18|pin@49||3.5|25
+APolysilicon|net@143|||S0|pin@49||3.5|25|contact@27||2.1|25
+APolysilicon|net@145|||S900|pin@50||2.1|26.6|contact@27||2.1|25
+Ametal-1|net@146|||S0|pin@46||-0.5|16.5|pin@51||-16.5|16.5
+Ametal-1|net@147|||S900|pin@51||-16.5|16.5|contact@26||-16.5|10.4
+Ametal-1|net@148|||S2700|contact@3||-0.5|10.4|pin@46||-0.5|16.5
+APolysilicon|net@149|||S2700|contact@21||-12.5|-19.9|nmos@4|poly-bottom|-12.5|-18
+APolysilicon|net@150|||S900|pmos@1|poly-bottom|1.5|35|contact@27||1.5|25
+APolysilicon|net@151|||S2700|pmos@0|poly-top|7.5|53|pin@52||7.5|54.5
+APolysilicon|net@152|||S1800|pin@52||7.5|54.5|contact@10||9.4|54.5
+Egnd||D5G2;|pinsVddG@0|gnd|G
+Egnd_1||D5G2;|pinsVddG@1|gnd|G
+Ein[1]|in|D5G2;|pin@30||I
+Emc||D5G2;|pin@28||I
+Estate[1]|pred|D5G2;|pin@51||O
+Estatee[1]|pred_1|D5G2;|pin@33||O
+Evdd||D5G2;|pinsVddG@0|vdd|P
+Evdd_1||D5G2;|pinsVddG@0|vdd_1|P
+Evdd_2||D5G2;|pinsVddG@1|vdd|P
+Evdd_3||D5G2;|pinsVddG@1|vdd_1|P
+X