migrate jelib->delib

[fleet.git] / chips / marina / electric / driversM.delib / sucANDdri10.sch

diff --git a/chips/marina/electric/driversM.delib/sucANDdri10.sch b/chips/marina/electric/driversM.delib/sucANDdri10.sch
new file mode 100644 (file)
index 0000000..62b85a4
--- /dev/null
+++ b/chips/marina/electric/driversM.delib/sucANDdri10.sch
@@ -0,0 +1,60 @@
+HdriversM|8.10k
+
+# External Libraries:
+
+LorangeTSMC090nm|orangeTSMC090nm
+
+LredFive|redFive
+
+# Cell sucANDdri10;1{sch}
+CsucANDdri10;1{sch}||schematic|1188777360591|1244175633338||ATTR_verilog_template(D5G1;NTX0.5;Y-13;)Sand (strong1, weak0) #(200) $(node_name) ($(succ), $(inA), $(inB));
+IorangeTSMC090nm:PMOSx;1{ic}|PMOSx@0||0|6|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)S10
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||-23|-2||||
+NOff-Page|conn@1||21|0||||
+NOff-Page|conn@2||-23|2||||
+IredFive:inv;1{ic}|inv@0||13|-9|X||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S4|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+IredFive:nand2;1{ic}|nand2@0||-14.5|0|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_X(D5G1.5;NPX2.5;Y2.5;)S2.5|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+IredFive:nms2b;1{ic}|nms2@0||0|-9|X||D0G4;|ATTR_Delay(D5G1;NPX3;Y-0.5;)I100|ATTR_X(D5G1.5;NOJPX-2.25;Y1.5;)S2
+Ngeneric:Invisible-Pin|pin@0||2.5|30|||||ART_message(D5G6;)SsucANDdri10
+Ngeneric:Invisible-Pin|pin@1||1.5|21|||||ART_message(D5G3;)Sies 20 April 2009
+Ngeneric:Invisible-Pin|pin@2||0.5|25|||||ART_message(D5G4;)Ssuccessor AND driver size 10
+NWire_Pin|pin@4||0|0||||
+NWire_Pin|pin@6||-19|2||||
+NWire_Pin|pin@7||-19|1||||
+NWire_Pin|pin@8||-19|-2||||
+NWire_Pin|pin@9||-19|-1||||
+NWire_Pin|pin@12||17|-9||||
+NWire_Pin|pin@13||17|0||||
+NWire_Pin|pin@28||-4|6||||
+NWire_Pin|pin@31||-4|0||||
+NWire_Pin|pin@32||-4|-5||||
+NPower|pwr@0||0|13.5||||
+IsucANDdri10;1{ic}|sucANDdr@2||19.5|11|||D5G4;
+IorangeTSMC090nm:wire90;1{ic}|wire90@0||-8|0|||D0G4;|ATTR_L(D5G1;PUD)D309.00000000000006|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)S1|ATTR_width(D5G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@1||6.5|-9|||D0G4;|ATTR_L(D5G1;PUD)D114.9|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)S1|ATTR_width(D5G1;NPY-2;)I3
+Awire|net@6|||1800|pin@4||0|0|pin@13||17|0
+Awire|net@8|||1800|conn@2|y|-21|2|pin@6||-19|2
+Awire|net@9|||900|pin@6||-19|2|pin@7||-19|1
+Awire|net@11|||1800|conn@0|y|-21|-2|pin@8||-19|-2
+Awire|net@12|||2700|pin@8||-19|-2|pin@9||-19|-1
+Awire|net@19|||1800|inv@0|in|15.5|-9|pin@12||17|-9
+Awire|net@20|||1800|pin@13||17|0|conn@1|a|19|0
+Awire|net@21|||2700|pin@12||17|-9|pin@13||17|0
+Awire|net@46|||900|pin@4||0|0|nms2@0|d|0|-3
+Awire|net@51|||0|PMOSx@0|g|-3|6|pin@28||-4|6
+Awire|net@53|||900|pwr@0||0|13.5|PMOSx@0|s|0|8
+Awire|net@57|||2700|pin@4||0|0|PMOSx@0|d|0|4
+Awire|net@58|||1800|pin@9||-19|-1|nand2@0|ina|-17|-1
+Awire|net@59|||1800|pin@7||-19|1|nand2@0|inb|-17|1
+Awire|net@67|||0|wire90@0|a|-10.5|0|nand2@0|out|-12|0
+Awire|net@68|||900|pin@31||-4|0|pin@32||-4|-5
+Awire|net@69|||900|pin@28||-4|6|pin@31||-4|0
+Awire|net@70|||1800|wire90@0|b|-5.5|0|pin@31||-4|0
+Awire|net@71|||0|inv@0|out|10.5|-9|wire90@1|b|9|-9
+Awire|net@74|||0|nms2@0|g2|-3|-5|pin@32||-4|-5
+Awire|net@75|||1800|nms2@0|g|3|-9|wire90@1|a|4|-9
+EinA||D4G2;|conn@0|a|I
+EinB||D4G2;|conn@2|a|I
+Esucc||D6G2;|conn@1|y|O
+X