migrate jelib->delib

[fleet.git] / chips / marina / electric / fillM.delib / fillAll1x5gnd.lay

diff --git a/chips/marina/electric/fillM.delib/fillAll1x5gnd.lay b/chips/marina/electric/fillM.delib/fillAll1x5gnd.lay
new file mode 100644 (file)
index 0000000..3e78e18
--- /dev/null
+++ b/chips/marina/electric/fillM.delib/fillAll1x5gnd.lay
@@ -0,0 +1,81 @@
+HfillM|8.10k
+
+# Cell fillAll1x5gnd;1{lay}
+CfillAll1x5gnd;1{lay}||cmos90|1239558376254|1244116070813||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1244122072408
+Ngeneric:Facet-Center|art@0||0|0||||AV
+IfillAllGNDctr;1{lay}|fillAllG@0||0|0|||D5G4;
+IfillAllGNDctr;1{lay}|fillAllG@3||0|-288|||D5G4;
+IfillAllGNDctr;1{lay}|fillAllG@4||0|-144|||D5G4;
+IfillAllGNDctr;1{lay}|fillAllG@5||0|144|||D5G4;
+IfillAllGNDctr;1{lay}|fillAllG@6||0|288|||D5G4;
+Ametal-9|net@3|||S900|fillAllG@4|vdd_1|-54|-216|fillAllG@3|vdd|-54|-216
+Ametal-9|net@12|||S900|fillAllG@3|gnd|-18|-216|fillAllG@4|gnd_1|-18|-216
+Ametal-9|net@13|||S900|fillAllG@3|gnd_2|18|-216|fillAllG@4|gnd_3|18|-216
+Ametal-9|net@14|||S900|fillAllG@3|vdd_2|54|-216|fillAllG@4|vdd_3|54|-216
+Ametal-9|net@21|||S900|fillAllG@6|vdd_1|-54|216|fillAllG@5|vdd|-54|216
+Ametal-9|net@22|||S900|fillAllG@0|gnd_1|-18|-72|fillAllG@4|gnd|-18|-72
+Ametal-9|net@23|||S900|fillAllG@0|gnd_3|18|-72|fillAllG@4|gnd_2|18|-72
+Ametal-9|net@24|||S900|fillAllG@4|vdd|-54|-72|fillAllG@0|vdd_1|-54|-72
+Ametal-9|net@25|||S900|fillAllG@0|vdd_3|54|-72|fillAllG@4|vdd_2|54|-72
+Ametal-9|net@26|||S900|fillAllG@0|gnd|-18|72|fillAllG@5|gnd_1|-18|72
+Ametal-9|net@27|||S900|fillAllG@0|gnd_2|18|72|fillAllG@5|gnd_3|18|72
+Ametal-9|net@28|||S900|fillAllG@5|gnd|-18|216|fillAllG@6|gnd_1|-18|216
+Ametal-9|net@29|||S900|fillAllG@5|gnd_2|18|216|fillAllG@6|gnd_3|18|216
+Ametal-9|net@30|||S900|fillAllG@5|vdd_2|54|216|fillAllG@6|vdd_3|54|216
+Ametal-9|net@31|||S900|fillAllG@0|vdd_2|54|72|fillAllG@5|vdd_3|54|72
+Ametal-9|net@32|||S900|fillAllG@5|vdd_1|-54|72|fillAllG@0|vdd|-54|72
+Ametal-3|net@34|||S900|fillAllG@4|gnd_8|0|-72|fillAllG@0|gnd_9|0|-72
+Ametal-3|net@35|||S900|fillAllG@6|gnd_9|0|216|fillAllG@5|gnd_8|0|216
+Ametal-3|net@38|||S900|fillAllG@4|gnd_9|0|-216|fillAllG@3|gnd_8|0|-216
+Ametal-3|net@41|||S900|fillAllG@0|gnd_8|0|72|fillAllG@5|gnd_9|0|72
+Egnd||D5G5;|fillAllG@6|gnd|G
+Egnd_1||D5G5;|fillAllG@3|gnd_1|G
+Egnd_2||D5G5;|fillAllG@6|gnd_2|G
+Egnd_3||D5G5;|fillAllG@3|gnd_3|G
+Egnd_4||D5G5;|fillAllG@0|gnd_4|G
+Egnd_5||D5G5;|fillAllG@0|gnd_5|G
+Egnd_6||D5G5;|fillAllG@0|gnd_6|G
+Egnd_7||D5G5;|fillAllG@0|gnd_7|G
+Egnd_8||D5G5;|fillAllG@6|gnd_8|G
+Egnd_9||D5G5;|fillAllG@3|gnd_9|G
+Egnd_17||D5G5;|fillAllG@3|gnd_4|G
+Egnd_18||D5G5;|fillAllG@3|gnd_5|G
+Egnd_19||D5G5;|fillAllG@3|gnd_6|G
+Egnd_20||D5G5;|fillAllG@3|gnd_7|G
+Egnd_21||D5G5;|fillAllG@4|gnd_4|G
+Egnd_22||D5G5;|fillAllG@4|gnd_5|G
+Egnd_23||D5G5;|fillAllG@4|gnd_6|G
+Egnd_24||D5G5;|fillAllG@4|gnd_7|G
+Egnd_25||D5G5;|fillAllG@5|gnd_4|G
+Egnd_26||D5G5;|fillAllG@5|gnd_5|G
+Egnd_27||D5G5;|fillAllG@5|gnd_6|G
+Egnd_28||D5G5;|fillAllG@5|gnd_7|G
+Egnd_29||D5G5;|fillAllG@6|gnd_4|G
+Egnd_30||D5G5;|fillAllG@6|gnd_5|G
+Egnd_31||D5G5;|fillAllG@6|gnd_6|G
+Egnd_32||D5G5;|fillAllG@6|gnd_7|G
+Evdd||D5G5;|fillAllG@6|vdd|P
+Evdd_1||D5G5;|fillAllG@3|vdd_1|P
+Evdd_2||D5G5;|fillAllG@6|vdd_2|P
+Evdd_3||D5G5;|fillAllG@3|vdd_3|P
+Evdd_4||D5G5;|fillAllG@0|vdd_4|P
+Evdd_5||D5G5;|fillAllG@0|vdd_5|P
+Evdd_6||D5G5;|fillAllG@0|vdd_6|P
+Evdd_7||D5G5;|fillAllG@0|vdd_7|P
+Evdd_16||D5G5;|fillAllG@3|vdd_4|P
+Evdd_17||D5G5;|fillAllG@3|vdd_5|P
+Evdd_18||D5G5;|fillAllG@3|vdd_6|P
+Evdd_19||D5G5;|fillAllG@3|vdd_7|P
+Evdd_20||D5G5;|fillAllG@4|vdd_4|P
+Evdd_21||D5G5;|fillAllG@4|vdd_5|P
+Evdd_22||D5G5;|fillAllG@4|vdd_6|P
+Evdd_23||D5G5;|fillAllG@4|vdd_7|P
+Evdd_24||D5G5;|fillAllG@5|vdd_4|P
+Evdd_25||D5G5;|fillAllG@5|vdd_5|P
+Evdd_26||D5G5;|fillAllG@5|vdd_6|P
+Evdd_27||D5G5;|fillAllG@5|vdd_7|P
+Evdd_28||D5G5;|fillAllG@6|vdd_4|P
+Evdd_29||D5G5;|fillAllG@6|vdd_5|P
+Evdd_30||D5G5;|fillAllG@6|vdd_6|P
+Evdd_31||D5G5;|fillAllG@6|vdd_7|P
+X