migrate jelib->delib

[fleet.git] / chips / marina / electric / gates2inM.delib / pass10.lay

diff --git a/chips/marina/electric/gates2inM.delib/pass10.lay b/chips/marina/electric/gates2inM.delib/pass10.lay
new file mode 100644 (file)
index 0000000..c6114c8
--- /dev/null
+++ b/chips/marina/electric/gates2inM.delib/pass10.lay
@@ -0,0 +1,62 @@
+Hgates2inM|8.10k
+
+# External Libraries:
+
+LwiresL|wiresL
+
+# Cell pass10;1{lay}
+Cpass10;1{lay}||cmos90|1191015378230|1238257435226|
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NMetal-1-Polysilicon-Con|contact@12||0|-27.5||5.2||
+NMetal-1-Polysilicon-Con|contact@13||0|21.5||5.2||
+NMetal-1-P-Active-Con|contact@14||-4|-49||20.8||
+NMetal-1-N-Active-Con|contact@15||-4|0||20.8||
+NMetal-1-P-Active-Con|contact@16||4|-49||20.8||
+NMetal-1-N-Active-Con|contact@20||4|0||20.8||
+NN-Transistor|nmos@6||0|0||26||
+NMetal-1-Pin|pin@16||0|25||||
+NMetal-1-Pin|pin@17||0|-25||||
+NMetal-1-Pin|pin@20||5.5|-38.6||||
+NMetal-1-Pin|pin@22||5.5|-10.4||||
+NMetal-1-Pin|pin@25||-5.5|-10.4||||
+NMetal-1-Pin|pin@26||-5.5|-38.6||||
+NMetal-1-Pin|pin@30||-4|-59.4||||
+IwiresL:pinsVddGnd;1{lay}|pinsVddG@2||-8.5|0|||D5G4;
+IwiresL:pinsVddGnd;1{lay}|pinsVddG@3||8.5|0|||D5G4;
+NP-Select-Node|plnode@18||0|50|19|52||A
+NP-Select-Node|plnode@19||0|-50|19|52||A
+NP-Well-Node|plnode@20||0|0|22|48||A
+NN-Select-Node|plnode@21||0|0|19|48||A
+NN-Well-Node|plnode@22||0|50|22|52||A
+NN-Well-Node|plnode@23||0|-50|22|52||A
+NP-Transistor|pmos@2||0|-49||26||
+AN-Active|net@49|||RS1800|contact@15||-4|0|nmos@6|diff-left|-2.8|0
+AP-Active|net@50|||RS1800|contact@14||-4|-49|pmos@2|diff-left|-2.8|-49
+AP-Active|net@51|||RS0|contact@16||4|-49|pmos@2|diff-right|2.8|-49
+Ametal-1|net@69|||S2700|contact@12||0|-27.5|pin@17||0|-25
+Ametal-1|net@75|||S0|pin@20||5.5|-38.6|contact@16||4|-38.6
+Ametal-2|net@78||6.2|S0|pinsVddG@3|gnd|8.5|0|pinsVddG@2|gnd|-8.5|0
+Ametal-2|net@79||6.2|S0|pinsVddG@3|vdd_1|8.5|-50|pinsVddG@2|vdd_1|-8.5|-50
+Ametal-2|net@80||6.2|S0|pinsVddG@3|vdd|8.5|50|pinsVddG@2|vdd|-8.5|50
+AN-Active|net@81|||RS0|contact@20||4|0|nmos@6|diff-right|2.8|0
+Ametal-1|net@83|||S2700|pin@20||5.5|-38.6|pin@22||5.5|-10.4
+Ametal-1|net@84|||S0|pin@22||5.5|-10.4|contact@20||4|-10.4
+Ametal-1|net@87|||S1800|pin@25||-5.5|-10.4|contact@15||-4|-10.4
+Ametal-1|net@89|||S1800|pin@26||-5.5|-38.6|contact@14||-4|-38.6
+Ametal-1|net@90|||S900|pin@16||0|25|contact@13||0|23.1
+Ametal-1|net@91|||S900|pin@25||-5.5|-10.4|pin@26||-5.5|-38.6
+Ametal-1|net@96|||S1800|pin@30||-4|-59.4|contact@14||-4|-59.4
+APolysilicon|net@97|||S900|contact@13||0|18.9|nmos@6|poly-top|0|18
+APolysilicon|net@98|||S900|contact@12||0|-30.1|pmos@2|poly-top|0|-31
+Edrn||D5G2;|pin@22||I
+Egnd||D5G2;|pinsVddG@2|gnd|G
+Egnd_1||D5G2;|pinsVddG@3|gnd|G
+Einb|passF|D5G2;|pin@16||I
+Eina|passT|D5G2;|pin@17||I
+Esrc||D5G2;|pin@25||I
+Esrc_1||D5G2;|pin@30||I
+Evdd||D5G2;|pinsVddG@2|vdd|P
+Evdd_1||D5G2;|pinsVddG@2|vdd_1|P
+Evdd_2||D5G2;|pinsVddG@3|vdd|P
+Evdd_3||D5G2;|pinsVddG@3|vdd_1|P
+X