migrate jelib->delib

[fleet.git] / chips / marina / electric / jtagController.delib / o2a.sch

diff --git a/chips/marina/electric/jtagController.delib/o2a.sch b/chips/marina/electric/jtagController.delib/o2a.sch
new file mode 100644 (file)
index 0000000..fee4f70
--- /dev/null
+++ b/chips/marina/electric/jtagController.delib/o2a.sch
@@ -0,0 +1,37 @@
+HjtagController|8.10k
+
+# External Libraries:
+
+LorangeTSMC090nm|orangeTSMC090nm
+
+LredFive|redFive
+
+# Cell o2a;2{sch}
+Co2a;2{sch}||schematic|1031350455000|1185367908213|I
+NOff-Page|conn@0||13.5|1.5||||
+NOff-Page|conn@1||-24|1||||
+NOff-Page|conn@2||-24|-1||||
+NOff-Page|conn@3||-24|3||||
+IredFive:nor2;1{ic}|nor2@0||-14.5|0|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-2;)I100|ATTR_X(D5G1.5;NPX2.25;Y2.25;)S1.75|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+IredFive:nor2n;1{ic}|nor2n@0||0|1.5|Y||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-2;)I100|ATTR_X(D5G1.5;NPX2.25;Y2.25;)S1.75|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+Io2a;2{ic}|o2a@0||4|5.5|||D0G4;
+NWire_Pin|pin@2||-6|3||||
+NWire_Pin|pin@3||-6|2.5||||
+NWire_Pin|pin@8||-10.5|0.5||||
+NWire_Pin|pin@9||-10.5|0||||
+IorangeTSMC090nm:wire90;1{ic}|wire180@0||-6.5|0.5|||D0G4;|ATTR_L(D5G1;PUD)I100|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+Awire|net@4|||1800|pin@3||-6|2.5|nor2n@0|ina|-2.5|2.5
+Awire|net@5|||0|conn@0|a|11.5|1.5|nor2n@0|out|2.5|1.5
+Awire|net@6|||0|nor2@0|ina|-17|-1|conn@2|y|-22|-1
+Awire|net@7|||0|nor2@0|inb|-17|1|conn@1|y|-22|1
+Awire|net@8|||0|pin@2||-6|3|conn@3|y|-22|3
+Awire|net@9|||2700|pin@3||-6|2.5|pin@2||-6|3
+Awire|net@20|||1800|wire180@0|b|-4|0.5|nor2n@0|inb|-2.5|0.5
+Awire|net@21|||0|wire180@0|a|-9|0.5|pin@8||-10.5|0.5
+Awire|net@22|||900|pin@8||-10.5|0.5|pin@9||-10.5|0
+Awire|net@23|||0|pin@9||-10.5|0|nor2@0|out|-12|0
+EinAa||D5G2;|conn@2|y|I
+EinAb||D5G2;|conn@1|y|I
+EinOb||D5G2;|conn@3|y|I
+Eout||D5G2;|conn@0|y|O
+X