migrate jelib->delib
[fleet.git] / chips / marina / electric / jtagScan.delib / scanRL.lay
diff --git a/chips/marina/electric/jtagScan.delib/scanRL.lay b/chips/marina/electric/jtagScan.delib/scanRL.lay
new file mode 100644 (file)
index 0000000..e1ac653
--- /dev/null
@@ -0,0 +1,53 @@
+HjtagScan|8.10k
+
+# Cell scanRL;1{lay}
+CscanRL;1{lay}||cmos90|1095791156000|1240848417057|I|DRC_last_good_drc()I[256,-1690637469]
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NX-Metal-1-Metal-2-Con|contact@0||128|24||6.2||
+NX-Metal-1-Metal-2-Con|contact@1||-63|-36||||
+NX-Metal-1-Metal-2-Con|contact@2||103|-36||||
+IinterfaceSmall;1{lay}|interfac@2||-90|0|||D5G4;
+IinterfaceSmall;1{lay}|interfac@3||150|0|X||D5G4;
+NMetal-2-Pin|pin@5||-77|-6||||
+Iscan_shift;1{lay}|scan_shi@0||0|0|||D5G4;
+Ametal-1|net@0|||S2700|scan_shi@0|rddata|128|0|contact@0||128|24
+Ametal-2|net@1||6.2|S0|scan_shi@0|vdd_1|146|24|contact@0||128|24
+Ametal-2|net@7|||S0|scan_shi@0|rd|146|0|interfac@3|rd|142|0
+Ametal-1|net@15|||S900|scan_shi@0|sdin|-63|0|contact@1||-63|-36
+Ametal-2|net@16|||S0|contact@1||-63|-36|interfac@2|scan_data|-82|-36
+Ametal-1|net@19|||S900|scan_shi@0|sdout|103|0|contact@2||103|-36
+Ametal-2|net@20|||S1800|contact@2||103|-36|interfac@3|scan_data|142|-36
+Ametal-2|net@71|||S0|interfac@3|scan_data_return|142|-42|interfac@2|scan_data_return|-82|-42
+Ametal-2|net@73|||S1800|interfac@2|rd|-82|0|interfac@3|rd|142|0
+Ametal-2|net@75|||S1800|interfac@2|phi1_return|-82|42|interfac@3|phi1_return|142|42
+Ametal-2|net@77|||S1800|interfac@2|phi2_return|-82|48|interfac@3|phi2_return|142|48
+Ametal-2|net@79|||S1800|interfac@2|wr|-82|54|interfac@3|wr|142|54
+Ametal-2|net@81|||S1800|interfac@2|mc|-82|60|interfac@3|mc|142|60
+Ametal-2|net@88|||S1800|interfac@2|phi2|-82|-6|pin@5||-77|-6
+Ametal-2|net@95|||S0|pin@5||-77|-6|scan_shi@0|phi2|-87|-6
+Ametal-2|net@97|||S0|scan_shi@0|phi1|5.5|-12|interfac@2|phi1|-82|-12
+Ametal-2|net@98|||S0|interfac@3|phi2|142|-6|scan_shi@0|phi2|-87|-6
+Ametal-2|net@101|||S0|interfac@3|phi1|142|-12|scan_shi@0|phi1|5.5|-12
+Egnd||D5G2;|scan_shi@0|gnd|G
+Egnd_1||D5G2;|scan_shi@0|gnd_1|G
+EjtagIn[1]||D5G2;|interfac@2|jtag[1]|I
+EjtagIn[2]||D5G2;|interfac@2|jtag[2]|B
+EjtagIn[3]||D5G2;|interfac@2|jtag[3]|B
+EjtagIn[4]||D5G2;|interfac@2|jtag[4]|B
+EjtagIn[5]||D5G2;|interfac@2|jtag[5]|B
+EjtagIn[6]||D5G2;|interfac@2|jtag[6]|B
+EjtagIn[7]||D5G2;|interfac@2|jtag[7]|B
+EjtagIn[8]||D5G2;|interfac@2|jtag[8]|O
+EjtagIn[0]|jtagIn[9]|D5G2;|interfac@2|jtag[9]|B
+EjtagOut[1]||D5G2;|interfac@3|jtag[1]|I
+EjtagOut[2]||D5G2;|interfac@3|jtag[2]|B
+EjtagOut[3]||D5G2;|interfac@3|jtag[3]|B
+EjtagOut[4]||D5G2;|interfac@3|jtag[4]|B
+EjtagOut[5]||D5G2;|interfac@3|jtag[5]|B
+EjtagOut[6]||D5G2;|interfac@3|jtag[6]|B
+EjtagOut[7]||D5G2;|interfac@3|jtag[7]|B
+EjtagOut[8]||D5G2;|interfac@3|jtag[8]|O
+EjtagOut[0]|jtagOut[9]|D5G2;|interfac@3|jtag[9]|B
+Evdd||D5G2;|scan_shi@0|vdd|P
+Evdd_1||D5G2;|scan_shi@0|vdd_1|P
+X