migrate jelib->delib

[fleet.git] / chips / marina / electric / latchPartsK.delib / latchPointTmcLO.sch

diff --git a/chips/marina/electric/latchPartsK.delib/latchPointTmcLO.sch b/chips/marina/electric/latchPartsK.delib/latchPointTmcLO.sch
new file mode 100644 (file)
index 0000000..e0017b1
--- /dev/null
+++ b/chips/marina/electric/latchPartsK.delib/latchPointTmcLO.sch
@@ -0,0 +1,40 @@
+HlatchPartsK|8.10k
+
+# External Libraries:
+
+LorangeTSMC090nm|orangeTSMC090nm
+
+# Cell latchPointTmcLO;1{sch}
+ClatchPointTmcLO;1{sch}||schematic|1188672817555|1207703645446|
+IorangeTSMC090nm:NMOSx;1{ic}|PMOSx@0||-12|-6|X||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)S3
+IorangeTSMC090nm:NMOSx;1{ic}|PMOSx@1||6|-6|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)S6
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@1||15|-12||||
+NOff-Page|conn@2||-8|6|||RRR|
+NOff-Page|conn@4||15|-18||||
+NGround|gnd@1||0|-2.5||||
+IlatchPointTmcLO;1{ic}|latchPoi@1||13|8|||D5G4;
+Ngeneric:Invisible-Pin|pin@0||-1.5|33.5|||||ART_message(D5G6;)SlatchPointTmcLO
+Ngeneric:Invisible-Pin|pin@1||-2.5|15.5|||||ART_message(D5G3;)Sies 6 April 2008
+Ngeneric:Invisible-Pin|pin@2||-3.5|25|||||ART_message(D5G4;)S[master clear input for,a non inverting latch,master clears LO]
+NWire_Pin|pin@10||6|-12||||
+NWire_Pin|pin@26||-12|-18||||
+NWire_Pin|pin@32||-8|-6||||
+NWire_Pin|pin@39||0|2||||
+NWire_Pin|pin@40||6|2||||
+NPower|pwr@1||-12|1||||
+Awire|net@17|||1800|pin@32||-8|-6|PMOSx@1|g|3|-6
+Awire|net@57|||900|PMOSx@0|s|-12|-8|pin@26||-12|-18
+Awire|net@67|||1800|PMOSx@0|g|-9|-6|pin@32||-8|-6
+Awire|net@68|||900|conn@2|y|-8|4|pin@32||-8|-6
+Awire|net@117|||2700|pin@10||6|-12|PMOSx@1|s|6|-8
+Awire|net@131|||1800|pin@10||6|-12|conn@1|a|13|-12
+Awire|net@132|||1800|pin@26||-12|-18|conn@4|a|13|-18
+Awire|net@133|||2700|gnd@1||0|-0.5|pin@39||0|2
+Awire|net@134|||1800|pin@39||0|2|pin@40||6|2
+Awire|net@135|||900|pin@40||6|2|PMOSx@1|d|6|-4
+Awire|net@137|||2700|PMOSx@0|d|-12|-4|pwr@1||-12|1
+Emc||D4G2;|conn@2|a|I
+Ex[F]||D6G2;|conn@4|y|O
+Ex[T]||D6G2;|conn@1|y|O
+X