migrate jelib->delib

[fleet.git] / chips / marina / electric / latchesK.delib / latch1in20B.sch

diff --git a/chips/marina/electric/latchesK.delib/latch1in20B.sch b/chips/marina/electric/latchesK.delib/latch1in20B.sch
new file mode 100644 (file)
index 0000000..b2060c3
--- /dev/null
+++ b/chips/marina/electric/latchesK.delib/latch1in20B.sch
@@ -0,0 +1,36 @@
+HlatchesK|8.10k
+
+# External Libraries:
+
+LorangeTSMC090nm|orangeTSMC090nm
+
+LredFive|redFive
+
+# Cell latch1in20B;1{sch}
+Clatch1in20B;1{sch}||schematic|1194187081843|1216651996218|
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||-27|-6||||
+NOff-Page|conn@1||-27|3||||
+NOff-Page|conn@4||24|-6||||
+Iraw1inLatchT;1{ic}|hi2inLat@0||-18|-6|||D5G4;
+IredFive:inv;1{ic}|inv@0||18|-6|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S20|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+IredFive:inv;1{ic}|invLT@0||0|-6|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S5|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+Ilatch1in20B;1{ic}|latch1in@1||6.5|7.5|||D5G4;
+Ngeneric:Invisible-Pin|pin@0||0|18|||||ART_message(D5G2;)Sies 21 July 2008
+Ngeneric:Invisible-Pin|pin@1||0|22.5|||||ART_message(D5G4;)Slatch with two amplifiers
+Ngeneric:Invisible-Pin|pin@2||0|27.5|||||ART_message(D5G6;)Slatch1in20B
+NWire_Pin|pin@8||-20|3||||
+IorangeTSMC090nm:wire90;1{ic}|wire90@0||-9|-6|||D0G4;|ATTR_L(D5G1;PUD)D250.9|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@1||9|-6|||D0G4;|ATTR_L(D5G1;PUD)D214.60000000000002|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+Awire|net@8|||1800|conn@1|y|-25|3|pin@8||-20|3
+Awire|net@9|||900|pin@8||-20|3|hi2inLat@0|hcl[A]|-20|-3
+Awire|net@17|||0|hi2inLat@0|inA[1]|-21|-6|conn@0|y|-25|-6
+Awire|net@18|||1800|wire90@0|b|-6.5|-6|invLT@0|in|-2.5|-6
+Awire|net@19|||0|wire90@0|a|-11.5|-6|hi2inLat@0|out[T]|-15|-6
+Awire|net@23|||1800|wire90@1|b|11.5|-6|inv@0|in|15.5|-6
+Awire|net@24|||0|conn@4|a|22|-6|inv@0|out|20.5|-6
+Awire|net@25|||0|wire90@1|a|6.5|-6|invLT@0|out|2.5|-6
+Ehcl||D4G2;|conn@1|a|I
+Ein[1]||D4G2;|conn@0|a|I
+Eout[1]||D6G2;|conn@4|y|O
+X