migrate jelib->delib

[fleet.git] / chips / marina / electric / latchesK.delib / latch2in10Alo.lay

diff --git a/chips/marina/electric/latchesK.delib/latch2in10Alo.lay b/chips/marina/electric/latchesK.delib/latch2in10Alo.lay
new file mode 100644 (file)
index 0000000..8058e75
--- /dev/null
+++ b/chips/marina/electric/latchesK.delib/latch2in10Alo.lay
@@ -0,0 +1,36 @@
+HlatchesK|8.10k
+
+# External Libraries:
+
+LlatchPartsK|latchPartsK
+
+# Cell latch2in10Alo;1{lay}
+Clatch2in10Alo;1{lay}||cmos90|1194186085518|1241981698008||ATTR_NCC(D5G3;NTY70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241981714344
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NX-Metal-1-Metal-2-Con|contact@0||0|-22||||
+NX-Metal-1-Metal-2-Con|contact@1||17.5|-22||||
+Iraw2inLatchF;1{lay}|hi2inLat@2||-8|0|||D5G4;
+IlatchPartsK:latchAmp10;1{lay}|latchAmp@0||27|0|||D5G4;
+NMetal-2-Pin|pin@12||35|50||||
+NMetal-1-Pin|pin@14||17.5|-25||||
+IlatchPartsK:shoulderFillWide;1{lay}|shoulder@0||28|50|X||D5G4;
+Ametal-2|net@3|||S0|contact@1||17.5|-22|contact@0||0|-22
+Ametal-2|net@31|||S0|latchAmp@0|gnd|19|0|hi2inLat@2|gnd_1|19|0
+Ametal-2|net@32|||S0|latchAmp@0|vdd|19|-50|hi2inLat@2|vdd_4|19|-50
+Ametal-2|net@33||6.2|S1800|hi2inLat@2|vdd_3|19|50|pin@12||35|50
+Ametal-1|net@34|||S2700|contact@0||0|-22|hi2inLat@2|out[F]|0|-12.5
+Ametal-1|net@36|||S0|latchAmp@0|in|23.5|-25|pin@14||17.5|-25
+Ametal-1|net@37|||S2700|pin@14||17.5|-25|contact@1||17.5|-22
+Egnd||D5G2;|hi2inLat@2|gnd|G
+Egnd_1||D5G2;|latchAmp@0|gnd_1|G
+Ehcl[A]||D5G2;|hi2inLat@2|hcl[A]|I
+Ehcl[B]||D5G2;|hi2inLat@2|hcl[B]|I
+Ehcl_1||D5G2;|hi2inLat@2|hcl_1|I
+EinA[1]||D5FLeave alone;G2;|hi2inLat@2|inA[1]|I
+EinB[1]||D5FLeave alone;G2;|hi2inLat@2|inB[1]|I
+Eout[1]||D5G2;|latchAmp@0|out[1]|O
+Evdd||D5G2;|hi2inLat@2|vdd|P
+Evdd_1||D5G2;|latchAmp@0|vdd_1|P
+Evdd_2||D5G2;|hi2inLat@2|vdd_2|P
+Evdd_3||D5G2;|pin@12||P
+X