migrate jelib->delib

[fleet.git] / chips / marina / electric / latchesK.delib / latch2in10Alomc.sch

diff --git a/chips/marina/electric/latchesK.delib/latch2in10Alomc.sch b/chips/marina/electric/latchesK.delib/latch2in10Alomc.sch
new file mode 100644 (file)
index 0000000..7c5a855
--- /dev/null
+++ b/chips/marina/electric/latchesK.delib/latch2in10Alomc.sch
@@ -0,0 +1,41 @@
+HlatchesK|8.10k
+
+# External Libraries:
+
+LorangeTSMC090nm|orangeTSMC090nm
+
+LredFive|redFive
+
+# Cell latch2in10Alomc;1{sch}
+Clatch2in10Alomc;1{sch}||schematic|1194187081843|1225233453322|
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||-21|0||||
+NOff-Page|conn@1||-21|9||||
+NOff-Page|conn@3||-21|-9||||
+NOff-Page|conn@4||12|0||||
+Iraw2inLatchFmc;1{ic}|hi2inLat@0||-9|0|||D5G4;
+IredFive:invLT;1{ic}|invLT@0||4.5|0|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5G1.5;NPX1.5;Y2;)S10|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+Ilatch2in10Alomc;1{ic}|latch2in@0||8|9|||D5G4;
+Ngeneric:Invisible-Pin|pin@0||0|17|||||ART_message(D5G3;)S[ies 10 November 2007,renamed 20 March 2008]
+Ngeneric:Invisible-Pin|pin@1||0|22.5|||||ART_message(D5G4;)Smc latch with one amplifier
+Ngeneric:Invisible-Pin|pin@2||0|27.5|||||ART_message(D5G6;)Slatch2in10Alomc
+NWire_Pin|pin@8||-11|9||||
+NWire_Pin|pin@9||-11|-9||||
+NWire_Pin|pin@10||-5|0||||
+NWire_Pin|pin@11||-5|5||||
+IorangeTSMC090nm:wire90;1{ic}|wire90@0||-2|0|||D0G4;|ATTR_L(D5G1;PUD)D283.0|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+Awire|dataBar|D5G2;||2700|pin@10||-5|0|pin@11||-5|5
+Awire|net@8|||1800|conn@1|y|-19|9|pin@8||-11|9
+Awire|net@9|||900|pin@8||-11|9|hi2inLat@0|hcl|-11|3
+Awire|net@10|||1800|conn@3|y|-19|-9|pin@9||-11|-9
+Awire|net@11|||2700|pin@9||-11|-9|hi2inLat@0|mc|-11|-3
+Awire|net@13|||1800|invLT@0|out|7|0|conn@4|a|10|0
+Awire|net@18|||1800|conn@0|y|-19|0|hi2inLat@0|inA[1]|-12|0
+Awire|net@19|||1800|hi2inLat@0|out[F]|-6|0|pin@10||-5|0
+Awire|net@20|||1800|wire90@0|b|0.5|0|invLT@0|in|2|0
+Awire|net@21|||1800|pin@10||-5|0|wire90@0|a|-4.5|0
+Ehcl||D4G2;|conn@1|a|I
+EinA[1]||D4G2;|conn@0|a|I
+Emc||D4G2;|conn@3|a|I
+Eout[1]||D6G2;|conn@4|y|O
+X