migrate jelib->delib

[fleet.git] / chips / marina / electric / latchesK.delib / passLatchT.sch

diff --git a/chips/marina/electric/latchesK.delib/passLatchT.sch b/chips/marina/electric/latchesK.delib/passLatchT.sch
new file mode 100644 (file)
index 0000000..8bc568b
--- /dev/null
+++ b/chips/marina/electric/latchesK.delib/passLatchT.sch
@@ -0,0 +1,56 @@
+HlatchesK|8.10k
+
+# External Libraries:
+
+LorangeTSMC090nm|orangeTSMC090nm
+
+LredFive|redFive
+
+# Cell passLatchT;1{sch}
+CpassLatchT;1{sch}||schematic|1208521673320|1209595725925||LEDRIVE_inv@0()F40.223755|LEDRIVE_inv@1()F12.18191|LEDRIVE_inv@2()F25.000002|LEDRIVE_mux1@0.nms2@0()F22.083002|LEDRIVE_mux1@0.pms2@0()F22.083218|LEDRIVE_mux1@1.nms2@0()F5.1026616|LEDRIVE_mux1@1.pms2@0()F5.1029825|LEDRIVE_mux1@2.nms2@0()F5.1026616|LEDRIVE_mux1@2.pms2@0()F5.1029825|LEDRIVE_mux21_tr@0()F12.192992|LEDRIVE_mux21_tr@2()F12.192992|LEDRIVE_mux21_tr@3()F22.612944|LEDRIVE_nand2_sy@0()F13.266861|LEDRIVE_nand2_sy@1()F13.266861|LEDRIVE_nand2_sy@2()F4.2087545|LEDRIVE_nand3@0()F17.913712|LEDRIVE_nand3@1()F17.913712|LEDRIVE_nand3@2()F5.341881|LEDRIVE_nor2_sy@0()F19.59327|LEDRIVE_nor2_sy@1()F5.8922563
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||12|13|||R|
+NOff-Page|conn@1||-12|-12|||YRRR|
+NOff-Page|conn@2||12|-12|||YRRR|
+IredFive:invLT;1{ic}|invLT@0||-20|3|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_X(D5FLeave alone;G1.5;NPX1.5;Y2;)S2|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+IredFive:nms2b;1{ic}|nms2@0||0|-12|||D0G4;|ATTR_Delay(D5G1;NPX3;Y-0.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOJPX-2.25;Y1.5;)S2|ATTR_LEGATE()I1|ATTR_LEPARALLGRP()I-1
+IpassLatchT;1{ic}|passLatc@0||21.5|16|||D5G4;
+IredFive:passTF;1{ic}|passTF@0||12|0|RRR||D5G4;|ATTR_XN(D5FLeave alone;G1;NPX-3.25;Y-0.5;)S11|ATTR_XP(D5FLeave alone;G1;NPX3.25;Y-0.5;)S11
+Ngeneric:Invisible-Pin|pin@0||1|32|||||ART_message(D5G6;)SpassLatchT
+Ngeneric:Invisible-Pin|pin@1||1|23|||||ART_message(D5G3;)Sies 18 April 2008
+Ngeneric:Invisible-Pin|pin@2||1|27|||||ART_message(D5G4;)Sthe non-inverting pass latch
+NWire_Pin|pin@54||6|0.5||||
+NWire_Pin|pin@56||6|8||||
+NWire_Pin|pin@57||6|-0.5||||
+NWire_Pin|pin@59||6|-8||||
+NWire_Pin|pin@60||-6|3||||
+NWire_Pin|pin@61||-6|12||||
+NWire_Pin|pin@62||-6|-12||||
+NWire_Pin|pin@63||-24|3||||
+NWire_Pin|pin@64||-24|-3||||
+NWire_Pin|pin@65||0|-3||||
+IredFive:pms2;1{ic}|pms2@0||0|12|||D0G4;|ATTR_Delay(D5G1;NPX-3;Y-1.5;)I100|ATTR_X(D5FLeave alone;G1.5;NOLPX2.25;Y1;)S1
+IorangeTSMC090nm:wire90;1{ic}|wire90@19||-12|3|X||D0G4;|ATTR_L(D5FLeave alone;G1;PUD)D132.5|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NPY-1;)I1|ATTR_width(D5FLeave alone;G1;NPY-2;)I3
+Awire|c[F]|D5G2;||900|pin@57||6|-0.5|pin@59||6|-8
+Awire|c[T]|D5G2;||2700|pin@54||6|0.5|pin@56||6|8
+Awire|net@105|||0|passTF@0|passT|10|0.5|pin@54||6|0.5
+Awire|net@108|||1800|pms2@0|g2|3|8|pin@56||6|8
+Awire|net@109|||0|passTF@0|passF|10|-0.5|pin@57||6|-0.5
+Awire|net@112|||0|pin@59||6|-8|nms2@0|g2|3|-8
+Awire|net@114|||1800|wire90@19|a|-9.5|3|pin@60||-6|3
+Awire|net@115|||2700|pin@60||-6|3|pin@61||-6|12
+Awire|net@116|||1800|pin@61||-6|12|pms2@0|g|-3|12
+Awire|net@117|||900|pin@60||-6|3|pin@62||-6|-12
+Awire|net@118|||1800|pin@62||-6|-12|nms2@0|g|-3|-12
+Awire|net@119|||0|wire90@19|b|-14.5|3|invLT@0|out|-17.5|3
+Awire|net@122|||0|invLT@0|in|-22.5|3|pin@63||-24|3
+Awire|net@123|||900|pin@63||-24|3|pin@64||-24|-3
+Awire|net@124|||900|pin@65||0|-3|nms2@0|d|0|-6
+Awire|net@125|||1800|pin@64||-24|-3|pin@65||0|-3
+Awire|net@126|||2700|passTF@0|src|12|2|conn@0|a|12|11
+Awire|net@127|||900|passTF@0|drn|12|-2|conn@2|y|12|-10
+Awire|out|D5G2;||900|pms2@0|d|0|6|pin@65||0|-3
+Ec[T,F]||D4G2;|conn@1|a|I
+Ein||D4G2;|conn@2|a|I
+Eout||D6G2;|conn@0|y|O
+X