migrate jelib->delib

[fleet.git] / chips / marina / electric / latchesK.delib / raw2inLatchTmcLO.sch

diff --git a/chips/marina/electric/latchesK.delib/raw2inLatchTmcLO.sch b/chips/marina/electric/latchesK.delib/raw2inLatchTmcLO.sch
new file mode 100644 (file)
index 0000000..3390382
--- /dev/null
+++ b/chips/marina/electric/latchesK.delib/raw2inLatchTmcLO.sch
@@ -0,0 +1,61 @@
+HlatchesK|8.10k
+
+# External Libraries:
+
+LlatchPartsK|latchPartsK
+
+LorangeTSMC090nm|orangeTSMC090nm
+
+# Cell raw2inLatchTmcLO;1{sch}
+Craw2inLatchTmcLO;1{sch}||schematic|1194181042341|1207490004087|
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||9|0||||
+NOff-Page|conn@1||-18|6||||
+NOff-Page|conn@2||-18|12||||
+NOff-Page|conn@4||-18|-12||||
+Iraw2inLatchTmcLO;1{ic}|hi2inLat@0||12.5|11.5|||D5G4;
+IlatchPartsK:latchKeep;1{ic}|latchKee@0||0|0|||D5G4;
+IlatchPartsK:latchPointT;1{ic}|latchPoi@0||-8|6|||D5G4;
+IlatchPartsK:latchPointTmcLO;1{ic}|latchPoi@2||-8|-6|Y||D5G4;
+Ngeneric:Invisible-Pin|pin@13||1.5|34|||||ART_message(D5G6;)Sraw2inLatchTmcLO
+Ngeneric:Invisible-Pin|pin@14||0.5|19|||||ART_message(D5G3;)Sies 6 April 2008
+Ngeneric:Invisible-Pin|pin@15||-0.5|29|||||ART_message(D5G4;)STRUE output latch w/ HI mc
+NWire_Pin|pin@16||-10|12||||
+NWire_Pin|pin@17||-10|-12||||
+NWire_Pin|pin@19||4|-7||||
+NWire_Pin|pin@20||4|0||||
+NWire_Pin|pin@24||-4|-5||||
+NWire_Pin|pin@25||-4|2||||
+NWire_Pin|pin@26||-12|2||||
+NWire_Pin|pin@27||-12|-2||||
+NWire_Pin|pin@28||-4|-2||||
+NWire_Pin|pin@29||-12|0||||
+NWire_Pin|pin@31||4|7||||
+NWire_Pin|pin@32||-4|5||||
+IorangeTSMC090nm:wire90;1{ic}|wire90@0||-8|0|||D0G4;|ATTR_L(D5G1;PUD)D180.9|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+Awire|net@21|||1800|conn@1|y|-16|6|latchPoi@0|in[1]|-11|6
+Awire|net@22|||1800|conn@2|y|-16|12|pin@16||-10|12
+Awire|net@23|||900|pin@16||-10|12|latchPoi@0|hcl|-10|9
+Awire|net@25|||1800|conn@4|y|-16|-12|pin@17||-10|-12
+Awire|net@38|||900|pin@20||4|0|pin@19||4|-7
+Awire|net@41|||1800|pin@20||4|0|conn@0|a|7|0
+Awire|net@46|||900|pin@28||-4|-2|pin@24||-4|-5
+Awire|net@53|||0|pin@20||4|0|latchKee@0|out[B]|2|0
+Awire|net@56|||0|pin@25||-4|2|pin@26||-12|2
+Awire|net@57|||900|pin@29||-12|0|pin@27||-12|-2
+Awire|net@59|||1800|pin@27||-12|-2|pin@28||-4|-2
+Awire|net@60|||900|pin@26||-12|2|pin@29||-12|0
+Awire|net@61|||1800|pin@29||-12|0|wire90@0|a|-10.5|0
+Awire|net@63|||0|latchKee@0|out[s]|-2|0|wire90@0|b|-5.5|0
+Awire|net@68|||1800|latchPoi@0|x[T]|3|7|pin@31||4|7
+Awire|net@69|||2700|pin@25||-4|2|pin@32||-4|5
+Awire|net@70|||0|pin@32||-4|5|latchPoi@0|x[F]|-5|5
+Awire|net@77|||2700|pin@20||4|0|pin@31||4|7
+Awire|net@78|||2700|pin@17||-10|-12|latchPoi@2|mc|-10|-9
+Awire|net@79|||0|pin@19||4|-7|latchPoi@2|x[T]|3|-7
+Awire|net@80|||0|pin@24||-4|-5|latchPoi@2|x[F]|-5|-5
+Ehcl||D4G2;|conn@2|a|I
+EinA[1]||D4G2;|conn@1|a|I
+Emc||D4G2;|conn@4|a|I
+Eout[T]||D6G2;|conn@0|y|O
+X