migrate jelib->delib

[fleet.git] / chips / marina / electric / loopCountM.delib / ilcLoad.lay

diff --git a/chips/marina/electric/loopCountM.delib/ilcLoad.lay b/chips/marina/electric/loopCountM.delib/ilcLoad.lay
new file mode 100644 (file)
index 0000000..05c21a0
--- /dev/null
+++ b/chips/marina/electric/loopCountM.delib/ilcLoad.lay
@@ -0,0 +1,56 @@
+HloopCountM|8.10k
+
+# External Libraries:
+
+LcentersJ|centersJ
+
+LdriversM|driversM
+
+Lgates2inM|gates2inM
+
+LwiresL|wiresL
+
+# Cell ilcLoad;1{lay}
+CilcLoad;1{lay}||cmos90|1240768218601|1241981698008|I|ATTR_NCC(D5G3;NTY70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1244310956548
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NX-Metal-1-Metal-2-Con|contact@0||-108.5|10||||
+NX-Metal-1-Metal-2-Con|contact@1||107.5|10||||
+IcentersJ:ctrAND2in100;2{lay}|ctrAND2i@0||0|0|||D5G4;
+Igates2inM:nand5B;1{lay}|nand5B@0||-108.5|0|||D5G4;
+NMetal-1-Pin|pin@0||-101.5|12||||
+NMetal-1-Pin|pin@1||-91.5|12||||
+NMetal-1-Pin|pin@2||-87|12||||
+NMetal-1-Pin|pin@3||75.5|-19||||
+NMetal-2-Pin|pin@5||96|10||||
+IdriversM:predDri40;1{lay}|predDri4@0||99.5|0|||D5G4;
+IwiresL:wellContacts13;1{lay}|wellCont@0||-92.5|0|||D5G4;
+Ametal-2|net@0|||S1800|predDri4@0|gnd|79|0|ctrAND2i@0|gnd_1|88|0
+Ametal-2|net@1|||S1800|predDri4@0|vdd|79|50|ctrAND2i@0|vdd_2|88|50
+Ametal-2|net@2|||S1800|predDri4@0|vdd_1|79|-50|ctrAND2i@0|vdd_3|88|-50
+Ametal-2|net@3|||S0|wellCont@0|gnd_1|-88|0|ctrAND2i@0|gnd|-88|0
+Ametal-2|net@4|||S0|wellCont@0|vdd_2|-88|-50|ctrAND2i@0|vdd_1|-88|-50
+Ametal-2|net@5|||S0|wellCont@0|vdd_3|-88|50|ctrAND2i@0|vdd|-88|50
+Ametal-2|net@6|||S0|wellCont@0|gnd|-97|0|nand5B@0|gnd_1|-97|0
+Ametal-2|net@7|||S0|wellCont@0|vdd|-97|-50|nand5B@0|vdd_3|-97|-50
+Ametal-2|net@8|||S0|wellCont@0|vdd_1|-97|50|nand5B@0|vdd_2|-97|50
+Ametal-1|net@9|||S2700|nand5B@0|out|-101.5|-8.1|pin@0||-101.5|12
+Ametal-1|net@10|||S1800|pin@0||-101.5|12|pin@1||-91.5|12
+Ametal-1|net@11|||S1800|pin@1||-91.5|12|pin@2||-87|12
+Ametal-1|net@12|||S900|pin@2||-87|12|ctrAND2i@0|inB|-87|9
+Ametal-1|net@13|||S900|ctrAND2i@0|out|75.5|16|pin@3||75.5|-19
+Ametal-1|net@14|||S1800|pin@3||75.5|-19|predDri4@0|in|99.5|-19
+Ametal-1|net@15|||S900|nand5B@0|inb|-108.5|29|contact@0||-108.5|10
+Ametal-2|net@16|||S1800|contact@0||-108.5|10|pin@5||96|10
+Ametal-2|net@17|||S1800|pin@5||96|10|contact@1||107.5|10
+Ametal-1|net@18|||S900|predDri4@0|pred|107.5|20|contact@1||107.5|10
+Edo[ins]||D5G2;|pin@5||I
+Egnd||D5G2;|nand5B@0|gnd|G
+Egnd_1||D5G2;|predDri4@0|gnd_1|G
+Eout|ilc[load]|D5G2;|ctrAND2i@0|out|O
+Eina|sel[Ld]|D5G2;|nand5B@0|ina|I
+EinA|sel[rD]|D5G2;|ctrAND2i@0|inA|I
+Evdd||D5G2;|nand5B@0|vdd|P
+Evdd_1||D5G2;|nand5B@0|vdd_1|P
+Evdd_2||D5G2;|predDri4@0|vdd_2|P
+Evdd_3||D5G2;|predDri4@0|vdd_3|P
+X