migrate jelib->delib

[fleet.git] / chips / marina / electric / loopCountM.delib / olcCount.lay

diff --git a/chips/marina/electric/loopCountM.delib/olcCount.lay b/chips/marina/electric/loopCountM.delib/olcCount.lay
new file mode 100644 (file)
index 0000000..5ea85ba
--- /dev/null
+++ b/chips/marina/electric/loopCountM.delib/olcCount.lay
@@ -0,0 +1,87 @@
+HloopCountM|8.10k
+
+# External Libraries:
+
+LcentersJ|centersJ
+
+LdriversM|driversM
+
+Lgates2inM|gates2inM
+
+LwiresL|wiresL
+
+# Cell olcCount;1{lay}
+ColcCount;1{lay}||cmos90|1232819186778|1241981698008|I|ATTR_NCC(D5G3;NTX-6;Y140;)S["exportsConnectedByParent vdd /vdd_[0-9]+/","exportsConnectedByParent gnd /gnd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1244310956548
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NX-Metal-1-Metal-2-Con|contact@10||-44.5|-50||||
+NX-Metal-1-Metal-2-Con|contact@11||61.5|-50||||
+NX-Metal-1-Metal-2-Con|contact@12||-75.5|132||||
+NX-Metal-1-Metal-2-Con|contact@13||-59.5|132||||
+NX-Metal-1-Metal-2-Con|contact@14||-43.5|132||||
+IcentersJ:ctrAND1in30;1{lay}|ctrAND1i@2||6.5|-72|X||D5G4;
+IcentersJ:ctrAND2in100;2{lay}|ctrAND2i@0||0|72|X||D5G4;
+Igates2inM:nand10;1{lay}|nand10@0||54.5|-72|RR||D5G4;
+NMetal-2-Pin|pin@68||-31.5|132||||
+NMetal-1-Pin|pin@114||87|-6||||
+NMetal-1-Pin|pin@115||-18.5|-91||||
+NMetal-2-Pin|pin@121||-29|-50||||
+NMetal-1-Pin|pin@123||48.5|-6||||
+NMetal-1-Pin|pin@124||29|-56||||
+NMetal-1-Pin|pin@128||-59.5|126||||
+NMetal-1-Pin|pin@129||-43.5|126||||
+IwiresL:pinsVddGnd;1{lay}|pinsVddG@0||-88|-72|||D5G4;
+IwiresL:pinsVddGnd;1{lay}|pinsVddG@1||88|-72|||D5G4;
+IdriversM:predDri40;1{lay}|predDri4@0||-52.5|-72|||D5G4;
+IwiresL:select22;1{lay}|select22@0||-79.5|-72|||D5G4;
+IwiresL:select22;1{lay}|select22@1||77.5|-72|||D5G4;
+IwiresL:wellContacts13;1{lay}|wellCont@0||-27.5|-72|||D5G4;
+Ametal-1|net@403|||S2700|pin@114||87|-6|ctrAND2i@0|inB|87|81
+Ametal-1|net@404|||S900|ctrAND1i@2|out|-18.5|-72|pin@115||-18.5|-91
+Ametal-1|net@405|||S0|pin@115||-18.5|-91|predDri4@0|in|-52.5|-91
+Ametal-2|net@413|||S0|predDri4@0|gnd_1|-32|-72|wellCont@0|gnd|-32|-72
+Ametal-2|net@414|||S0|predDri4@0|vdd_3|-32|-122|wellCont@0|vdd|-32|-122
+Ametal-2|net@415|||S0|predDri4@0|vdd_2|-32|-22|wellCont@0|vdd_1|-32|-22
+Ametal-2|net@416|||S0|ctrAND1i@2|gnd_2|-23|-72|wellCont@0|gnd_1|-23|-72
+Ametal-2|net@417|||S0|ctrAND1i@2|vdd_5|-23|-122|wellCont@0|vdd_2|-23|-122
+Ametal-2|net@418|||S0|ctrAND1i@2|vdd_4|-23|-22|wellCont@0|vdd_3|-23|-22
+Ametal-2|net@420|||S0|nand10@0|gnd_1|36|-72|ctrAND1i@2|gnd_1|36|-72
+Ametal-2|net@421|||S0|nand10@0|vdd_2|36|-122|ctrAND1i@2|vdd_3|36|-122
+Ametal-2|net@422|||S0|nand10@0|vdd_3|36|-22|ctrAND1i@2|vdd_2|36|-22
+Ametal-1|net@425||0.4|S2700|predDri4@0|pred|-44.5|-52|contact@10||-44.5|-50
+Ametal-2|net@426|||S1800|contact@10||-44.5|-50|pin@121||-29|-50
+Ametal-2|net@427|||S1800|pin@121||-29|-50|contact@11||61.5|-50
+Ametal-1|net@428|||S900|nand10@0|inB|61.5|-47|contact@11||61.5|-50
+Ametal-1|net@431|||S900|pin@123||48.5|-6|nand10@0|out_2|48.5|-14
+Ametal-1|net@432|||S0|nand10@0|out|46|-56|pin@124||29|-56
+Ametal-1|net@433|||S900|pin@124||29|-56|ctrAND1i@2|in[1]|29|-57
+Ametal-2|net@434||6.2|S0|predDri4@0|vdd|-73|-22|pinsVddG@0|vdd|-88|-22
+Ametal-2|net@435||6.2|S1800|pinsVddG@0|gnd|-88|-72|predDri4@0|gnd|-73|-72
+Ametal-2|net@436||6.2|S1800|pinsVddG@0|vdd_1|-88|-122|predDri4@0|vdd_1|-73|-122
+Ametal-2|net@437||6.2|S1800|nand10@0|gnd|73|-72|pinsVddG@1|gnd|88|-72
+Ametal-2|net@438||6.2|S1800|nand10@0|vdd|73|-122|pinsVddG@1|vdd_1|88|-122
+Ametal-2|net@439||6.2|S1800|nand10@0|vdd_1|73|-22|pinsVddG@1|vdd|88|-22
+Ametal-2|net@444|||S0|contact@14||-43.5|132|contact@13||-59.5|132
+Ametal-1|net@445|||S2700|ctrAND2i@0|out|-75.5|88|contact@12||-75.5|132
+Ametal-2|net@446|||S0|contact@13||-59.5|132|contact@12||-75.5|132
+Ametal-1|net@447|||S2700|pin@128||-59.5|126|contact@13||-59.5|132
+Ametal-2|net@448|||S0|pin@68||-31.5|132|contact@14||-43.5|132
+Ametal-1|net@449|||S2700|pin@129||-43.5|126|contact@14||-43.5|132
+Ametal-1|net@450|||S0|pin@114||87|-6|pin@123||48.5|-6
+Edo[ins]||D5G2;|pin@121||I
+Efiore[Co]|fire[Co]|D5G2;|pin@115||O
+Egnd||D5G4;|ctrAND2i@0|gnd_1|G
+Egnd_2||D5G2;|ctrAND2i@0|gnd|G
+Egnd_3||D5G2;|pinsVddG@0|gnd|G
+Egnd_4||D5G2;|pinsVddG@1|gnd|G
+Eolc[dec]||D5G4;|pin@68||O
+Eolc[zero]||D5G4;|ctrAND2i@0|inA|I
+EinA|sel[Co]|D5G2;|nand10@0|inA|I
+Evdd||D5G4;|ctrAND2i@0|vdd_2|P
+Evdd_1||D5G2;|ctrAND2i@0|vdd_1|P
+Evdd_3||D5G4;|ctrAND2i@0|vdd_3|P
+Evdd_6||D5G2;|ctrAND2i@0|vdd|P
+Evdd_7||D5G2;|pinsVddG@0|vdd|P
+Evdd_8||D5G2;|pinsVddG@0|vdd_1|P
+Evdd_9||D5G2;|pinsVddG@1|vdd|P
+Evdd_10||D5G2;|pinsVddG@1|vdd_1|P
+X