migrate jelib->delib

[fleet.git] / chips / marina / electric / orangeTSMC090nm.delib / NMOSf_native_od18.sch

diff --git a/chips/marina/electric/orangeTSMC090nm.delib/NMOSf_native_od18.sch b/chips/marina/electric/orangeTSMC090nm.delib/NMOSf_native_od18.sch
new file mode 100644 (file)
index 0000000..f362806
--- /dev/null
+++ b/chips/marina/electric/orangeTSMC090nm.delib/NMOSf_native_od18.sch
@@ -0,0 +1,26 @@
+HorangeTSMC090nm|8.10k
+
+# Cell NMOSf_native_od18;1{sch}
+CNMOSf_native_od18;1{sch}||schematic|1021415734000|1158082635019||ATTR_Delay(D5G1;HNPX-8.5;Y-14.75;)I100|ATTR_L(D5FLeave alone;G1;HNOLPX-9;Y-13.5;)S24|ATTR_W(D5FLeave alone;G1;HNOLPX-8.5;Y-12.5;)S10|ATTR_CDL_template(D5G1;NTX2.5;Y-31.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_na18 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_NCC(D5G1;NTX2;Y-29;)StransistorType  NT-OD18-N-Transistor|ATTR_SPICE_template(D5G1;NTX4;Y-24.5;)SM$(node_name) $(d) $(g) $(s) gnd nch_na18 W='$(W)*(1+ABN/sqrt($(W)*$(L)))' L='$(L)' DELVTO='AVT0N/sqrt($(W)*$(L))'|ATTR_SPICE_template_calibre(D5G1;NTX2;Y-34;)SM$(node_name) $(d) $(g) $(s) gnd nch_na18 W='$(W)*0.05u' L='$(L)*0.05u'|ATTR_SPICE_template_smartspice(D5G1;NTX2.5;Y-22;)SM$(node_name) $(d) $(g) $(s) gnd nch_na18 W='$(W)' L='$(L)'|ATTR_verilog_template(D5G1;NTX3;Y-26.5;)Stranif1 #($(Delay)) $(node_name) ($(d), $(s), $(g));|prototype_center()I[0,0]
+INMOSf_native_od18;1{ic}|NMOSf@0||27|7.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_L(D5FLeave alone;G1;NOLPX3.5;)S24|ATTR_W(D6FLeave alone;G1;NOLPX2;Y1;)S10
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||6|-16.5||||
+NOff-Page|conn@1||6.5|0||||
+NOff-Page|conn@2||-16.5|-8||||
+NGround|gnd@0||5|-11||||
+N4-Port-Transistor|nmos4p@0||-2|-8|||R||ATTR_length(D5FLeave alone;G1;OLX-1;Y1;)S"P(\"L\")"|ATTR_width(D5FLeave alone;G1.5;OLX0.5;Y-1;)S"P(\"W\")"|SIM_spice_model(D5G1;X1.5;Y-4;)Snch_na18
+NWire_Pin|pin@0||0|-16.5||||
+NWire_Pin|pin@1||0|0||||
+Ngeneric:Invisible-Pin|pin@2||-3.5|20|||||ART_message(D5G6;)SNMOSf_native_od18
+Ngeneric:Invisible-Pin|pin@3||-3.5|13|||||ART_message(D5G2;)S3-terminal 1.8V native NMOS device
+Ngeneric:Invisible-Pin|pin@4||-3.5|8|||||ART_message(D5G2;)S[note that the minimum allowed native,"device dimensions are W=10, L=24"]
+Awire|net@0|||1800|pin@1||0|0|conn@1|a|4.5|0
+Awire|net@1|||1800|conn@2|y|-14.5|-8|nmos4p@0|g|-3|-8
+Awire|net@2|||2700|pin@0||0|-16.5|nmos4p@0|s|0|-10
+Awire|net@3|||0|conn@0|a|4|-16.5|pin@0||0|-16.5
+Awire|net@4|||2700|nmos4p@0|d|0|-6|pin@1||0|0
+Awire|net@5|||0|gnd@0||5|-9|nmos4p@0|b|0|-9
+Ed||D5G2;|conn@1|y|B
+Eg||D5G2;|conn@2|a|I
+Es||D5G2;|conn@0|y|B
+X