migrate jelib->delib

[fleet.git] / chips / marina / electric / predicateM.delib / ohSRxor6x12.sch

diff --git a/chips/marina/electric/predicateM.delib/ohSRxor6x12.sch b/chips/marina/electric/predicateM.delib/ohSRxor6x12.sch
new file mode 100644 (file)
index 0000000..d94a208
--- /dev/null
+++ b/chips/marina/electric/predicateM.delib/ohSRxor6x12.sch
@@ -0,0 +1,146 @@
+HpredicateM|8.10k
+
+# External Libraries:
+
+Lgates3inM|gates3inM
+
+LorangeTSMC090nm|orangeTSMC090nm
+
+# Cell ohSRxor6x12;1{sch}
+CohSRxor6x12;1{sch}||schematic|1227912375787|1232964235226|
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||62|-18|||XRR|
+NOff-Page|conn@1||61|18|||XRR|
+NOff-Page|conn@2||-54|0||||
+NOff-Page|conn@4||-56|9||||
+NOff-Page|conn@5||-55|-6|||Y|
+NWire_Con|conn@6||-33|30||||
+NOff-Page|conn@7||-56|-12||||
+Igates3inM:nand3in6.6symOR;2{ic}|nand3in6@3||54|-18|XRR||D5G4;
+Igates3inM:nor3in6.6symAND;1{ic}|nor3in3.@2||52|18|Y||D5G4;
+IohSRxor6x12;1{ic}|ohSRxor6@1||37.5|44|||D5G4;
+IohSRxor;1{ic}|ohSRxor@6||-30|-9|||D5G4;
+IohSRxor;1{ic}|ohSRxor@7||-30|9|Y||D5G4;
+IohSRxor;1{ic}|ohSRxor@8||0|9|Y||D5G4;
+IohSRxor;1{ic}|ohSRxor@9||0|-9|||D5G4;
+IohSRxor;1{ic}|ohSRxor@10||30|8|Y||D5G4;
+IohSRxor;1{ic}|ohSRxor@11||30|-9|||D5G4;
+Ngeneric:Invisible-Pin|pin@0||-2|44|||||ART_message(D5G5;)SohSRxor6x12
+Ngeneric:Invisible-Pin|pin@1||-1.5|40|||||ART_message(D5G3;)Sies 14 January 2009
+NWire_Pin|pin@10||45|-9||||
+NBus_Pin|pin@14||-39|12|-1|-1||
+NBus_Pin|pin@16||-39|-12|-1|-1||
+NWire_Pin|pin@30||45|-16||||
+NBus_Pin|pin@32||-9|12|-1|-1|X|
+NBus_Pin|pin@34||-9|-12|-1|-1|X|
+NBus_Pin|pin@36||21|-12|-1|-1|X|
+NBus_Pin|pin@37||21|8|-1|-1|X|
+NBus_Pin|pin@38||21|12|-1|-1|X|
+Ngeneric:Invisible-Pin|pin@47||44|-22|||||ART_message(D3G2;)S["in[1:2][T] tests flag[1] for set,clr.","in[3:4][T] tests flag[2] for set,clr.","in[5:6][T] tests flag[3] for set,clr.","if ANY match, \"any\" goes HI,",and it's a SKIP.]
+NBus_Pin|pin@50||-39|9|-1|-1||
+NBus_Pin|pin@51||-39|-9|-1|-1||
+NWire_Pin|pin@52||-32|15||||
+NWire_Pin|pin@57||45|8||||
+NWire_Pin|pin@58||45|16||||
+NWire_Pin|pin@59||15|9||||
+NWire_Pin|pin@60||15|18||||
+NWire_Pin|pin@61||-15|9||||
+NWire_Pin|pin@62||-15|24||||
+NWire_Pin|pin@63||45|24||||
+NWire_Pin|pin@64||45|20||||
+NBus_Pin|pin@65||-9|9|-1|-1||
+NBus_Pin|pin@66||-9|-9|-1|-1||
+NWire_Pin|pin@68||14|-9||||
+NWire_Pin|pin@69||14|-18||||
+NWire_Pin|pin@70||-15|-9||||
+NWire_Pin|pin@71||-15|-24||||
+NWire_Pin|pin@72||42|-24||||
+NWire_Pin|pin@73||42|-20||||
+NBus_Pin|pin@74||21|-9|-1|-1||
+NWire_Pin|pin@76||28|15||||
+NWire_Pin|pin@77||-2|15||||
+NWire_Pin|pin@78||-32|-15||||
+NWire_Pin|pin@79||-2|-15||||
+NWire_Pin|pin@80||28|-15||||
+Ngeneric:Invisible-Pin|pin@81||48|32|||||ART_message(D3G2;)S["in[1:2][F] tests flag[1] for set,clr.","in[3:4][F] tests flag[2] for set,clr.","in[5:6][F] tests flag[3] for set,clr.","if ALL match, \"all\" goes HI,",and it's a DO.]
+NWire_Pin|pin@82||-48|15||||
+NWire_Pin|pin@83||-48|-15||||
+NWire_Pin|pin@84||-48|-6||||
+NBus_Pin|pin@85||-33|25|-1|-1||
+NBus_Pin|pin@86||-33|36|-1|-1||
+Ngeneric:Invisible-Pin|pin@87||-54|-19|||||ART_message(D3G2;)S[for example:,"in[1][T] and flag[1][set] = SKIP","in[1][F] and flag[1][set] part of DO","in[2][T] and flag[1][clr] = SKIP","in[2][F] and flag[1][clr] part of DO"]
+IorangeTSMC090nm:wire90;1{ic}|wire90@1||9|-9|X||D0G4;|ATTR_L(D5G1;PUD)D395.6|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@3||39|-9|X||D0G4;|ATTR_L(D5G1;PUD)D313.6|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@4||-21|9|||D0G4;|ATTR_L(D5G1;PUD)D339.0|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@5||-21|-9|X||D0G4;|ATTR_L(D5G1;PUD)D286.1000000000001|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@6||9|9|X||D0G4;|ATTR_L(D5G1;PUD)D358.0999999999999|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@7||39|8|||D0G4;|ATTR_L(D5G1;PUD)D415.1|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+Abus|flag[A][set,clr]|D5G2;|-0.5|IJ2700|ohSRxor@6|flag[T,F]|-32|-5|ohSRxor@7|flag[T,F]|-32|5
+Abus|flag[B][set,clr]|D5G2;|-0.5|IJ2700|ohSRxor@9|flag[T,F]|-2|-5|ohSRxor@8|flag[T,F]|-2|5
+Abus|flag[D][set,clr]|D5G2;|-0.5|IJ2700|ohSRxor@11|flag[T,F]|28|-5|ohSRxor@10|flag[T,F]|28|4
+Abus|in[1:2][F]|D5G2;|-0.5|IJ900|pin@14||-39|12|pin@50||-39|9
+Abus|in[1:2][T]|D5G2;|-0.5|IJ2700|pin@16||-39|-12|pin@51||-39|-9
+Abus|in[1:6][F,T]|D5G2;|-0.5|IJ2700|conn@6||-33|30|pin@86||-33|36
+Abus|in[3:4][F]|D5G2;|-0.5|I900|pin@32||-9|12|pin@65||-9|9
+Abus|in[3:4][T]|D5G2;|-0.5|I2700|pin@34||-9|-12|pin@66||-9|-9
+Abus|in[5:6][F]|D5G2;|-0.5|IJ2700|pin@37||21|8|pin@38||21|12
+Abus|in[5:6][T]|D5G2;|-0.5|IJ2700|pin@36||21|-12|pin@74||21|-9
+Awire|match[12F]|D5G2;||2700|pin@61||-15|9|pin@62||-15|24
+Awire|match[12T]|D5G2;||900|pin@70||-15|-9|pin@71||-15|-24
+Awire|match[34F]|D5G2;||2700|pin@59||15|9|pin@60||15|18
+Awire|match[34T]|D5G2;||900|pin@68||14|-9|pin@69||14|-18
+Awire|match[56F]|D5G2;||2700|pin@57||45|8|pin@58||45|16
+Awire|match[56T]|D5G2;||2700|pin@30||45|-16|pin@10||45|-9
+Awire|net@21|||0|pin@10||45|-9|wire90@3|a|41.5|-9
+Awire|net@106|||0|wire90@5|b|-23.5|-9|ohSRxor@6|out|-27|-9
+Awire|net@107|||1800|ohSRxor@7|out|-27|9|wire90@4|a|-23.5|9
+Abus|net@109||-0.5|IJ1800|pin@50||-39|9|ohSRxor@7|sel[1,2]|-33|9
+Abus|net@111||-0.5|IJ1800|pin@51||-39|-9|ohSRxor@6|sel[1,2]|-33|-9
+Awire|net@118|||2700|ohSRxor@7|resetLO|-32|13|pin@52||-32|15
+Awire|net@122|||1800|ohSRxor@9|out|3|-9|wire90@1|b|6.5|-9
+Awire|net@125|||1800|ohSRxor@8|out|3|9|wire90@6|b|6.5|9
+Awire|net@134|||1800|wire90@7|b|41.5|8|pin@57||45|8
+Awire|net@136|||1800|pin@58||45|16|nor3in3.@2|inC|49|16
+Awire|net@137|||1800|wire90@6|a|11.5|9|pin@59||15|9
+Awire|net@139|||1800|pin@60||15|18|nor3in3.@2|inB|49|18
+Awire|net@140|||1800|wire90@4|b|-18.5|9|pin@61||-15|9
+Awire|net@142|||1800|pin@62||-15|24|pin@63||45|24
+Awire|net@143|||900|pin@63||45|24|pin@64||45|20
+Awire|net@144|||1800|pin@64||45|20|nor3in3.@2|inA|49|20
+Abus|net@146||-0.5|1800|pin@65||-9|9|ohSRxor@8|sel[1,2]|-3|9
+Abus|net@148||-0.5|1800|pin@66||-9|-9|ohSRxor@9|sel[1,2]|-3|-9
+Awire|net@153|||0|conn@0|a|60|-18|nand3in6@3|out|56.5|-18
+Awire|net@154|||1800|wire90@1|a|11.5|-9|pin@68||14|-9
+Awire|net@156|||1800|pin@69||14|-18|nand3in6@3|inB|51|-18
+Awire|net@157|||1800|wire90@5|a|-18.5|-9|pin@70||-15|-9
+Awire|net@159|||1800|pin@71||-15|-24|pin@72||42|-24
+Awire|net@160|||2700|pin@72||42|-24|pin@73||42|-20
+Awire|net@161|||1800|pin@73||42|-20|nand3in6@3|inA|51|-20
+Abus|net@162||-0.5|IJ1800|pin@37||21|8|ohSRxor@10|sel[1,2]|27|8
+Abus|net@164||-0.5|IJ1800|pin@74||21|-9|ohSRxor@11|sel[1,2]|27|-9
+Awire|net@166|||1800|pin@30||45|-16|nand3in6@3|inC|51|-16
+Awire|net@167|||1800|pin@52||-32|15|pin@77||-2|15
+Awire|net@169|||900|pin@76||28|15|ohSRxor@10|resetLO|28|12
+Awire|net@171|||2700|ohSRxor@8|resetLO|-2|13|pin@77||-2|15
+Awire|net@172|||900|ohSRxor@6|resetLO|-32|-13|pin@78||-32|-15
+Awire|net@173|||1800|pin@78||-32|-15|pin@79||-2|-15
+Awire|net@174|||2700|pin@79||-2|-15|ohSRxor@9|resetLO|-2|-13
+Awire|net@175|||1800|pin@79||-2|-15|pin@80||28|-15
+Awire|net@176|||2700|pin@80||28|-15|ohSRxor@11|resetLO|28|-13
+Awire|net@177|||0|wire90@7|a|36.5|8|ohSRxor@10|out|33|8
+Awire|net@178|||0|wire90@3|b|36.5|-9|ohSRxor@11|out|33|-9
+Awire|net@179|||0|conn@1|a|59|18|nor3in3.@2|out|55|18
+Awire|net@180|||0|pin@52||-32|15|pin@82||-48|15
+Awire|net@181|||900|pin@82||-48|15|pin@84||-48|-6
+Awire|net@182|||1800|pin@83||-48|-15|pin@78||-32|-15
+Awire|net@183|||900|pin@84||-48|-6|pin@83||-48|-15
+Awire|net@184|||1800|conn@5|y|-53|-6|pin@84||-48|-6
+Awire|net@185|||0|pin@76||28|15|pin@77||-2|15
+Abus|sel[1:12]|D5G2;|-0.5|IJ900|conn@6||-33|30|pin@85||-33|25
+Eall||D6G2;|conn@1|y|O
+Eany||D6G2;|conn@0|y|O
+Eflag[1:3][set,clr]|flag[A,B,D][set,clr]|D4G2;|conn@2|a|I
+Ein[1:6][F]||D4G2;|conn@4|a|I
+Ein[1:6][T]||D4G2;|conn@7|a|I
+EresetLO||D4G2;|conn@5|a|I
+X