migrate jelib->delib

[fleet.git] / chips / marina / electric / registersM.delib / data1in60Cx37.lay

diff --git a/chips/marina/electric/registersM.delib/data1in60Cx37.lay b/chips/marina/electric/registersM.delib/data1in60Cx37.lay
new file mode 100644 (file)
index 0000000..9cc4408
--- /dev/null
+++ b/chips/marina/electric/registersM.delib/data1in60Cx37.lay
@@ -0,0 +1,117 @@
+HregistersM|8.10k
+
+# External Libraries:
+
+LlatchesK|latchesK
+
+# Cell data1in60Cx37;1{lay}
+Cdata1in60Cx37;1{lay}||cmos90|1242082486246|1242083097708||ATTR_NCC(D5G5;NTY140;)S["exportsConnectedByParent vdd /vdd_[0-9]+/","exportsConnectedByParent gnd /gnd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1242083102909
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NMetal-1-Polysilicon-Con|contact@0||-162|-10||5.2||
+NX-Metal-1-Metal-2-Con|contact@1||-162|-11.7||1.2||
+Idata1in60Cx18;3{lay}|data1in6@0||-936|0|X||D5G4;
+Idata1in60Cx18;3{lay}|data1in6@1||936|0|||D5G4;
+IlatchesK:latch1in60Cm2up;1{lay}|latch1in@0||-216|-72|X||D5G4;
+NMetal-2-Pin|pin@2||0|-11.7||||
+Ametal-2|net@9||6.2|S1800|data1in6@0|gnd_3|-288|72|data1in6@1|gnd_3|288|72
+Ametal-2|net@10||1.2|S0|data1in6@1|dcl|288|-11.7|pin@2||0|-11.7
+Ametal-2|net@14||6.2|S0|data1in6@1|vdd_7|288|122|data1in6@0|vdd_7|-288|122
+Ametal-2|net@15||6.2|S0|data1in6@1|vdd_8|288|22|data1in6@0|vdd_8|-288|22
+Ametal-2|net@19|||S0|latch1in@0|gnd_1|-288|-72|data1in6@0|gnd|-288|-72
+Ametal-2|net@20|||S0|latch1in@0|vdd_3|-288|-22|data1in6@0|vdd_2|-288|-22
+Ametal-2|net@21|||S0|latch1in@0|vdd_4|-288|-122|data1in6@0|vdd|-288|-122
+Ametal-2|net@22||6.2|S1800|latch1in@0|gnd|-144|-72|data1in6@1|gnd|288|-72
+Ametal-2|net@23||6.2|S0|data1in6@1|vdd|288|-122|latch1in@0|vdd|-144|-122
+Ametal-2|net@24||6.2|S0|data1in6@1|vdd_2|288|-22|latch1in@0|vdd_2|-144|-22
+APolysilicon|net@25|||S900|contact@0||-162|-12.6|latch1in@0|hcl|-162|-13.5
+Ametal-2|net@26||1.2|S0|contact@1||-162|-11.7|data1in6@0|dcl|-288|-11.7
+Ametal-1|net@27|||S900|contact@0||-162|-11.7|contact@1||-162|-11.7
+Ametal-2|net@28||1.2|S0|pin@2||0|-11.7|contact@1||-162|-11.7
+Egnd_1|gnd|D5G5;|data1in6@1|gnd_1|G
+Egnd_2|gnd_1|D5G5;|data1in6@1|gnd_2|G
+Egnd_3|gnd_2|D5G5;|data1in6@0|gnd_1|G
+Egnd_4|gnd_3|D5G5;|data1in6@0|gnd_2|G
+Ein[1]||D5G5;|data1in6@1|inS[1]|I
+Ein[2]||D5G5;|data1in6@1|inS[2]|I
+Ein[3]||D5G5;|data1in6@1|inS[3]|I
+Ein[4]||D5G5;|data1in6@1|inS[4]|I
+Ein[5]||D5G5;|data1in6@1|inS[5]|I
+Ein[6]||D5G5;|data1in6@1|inS[6]|I
+Ein[7]||D5G5;|data1in6@1|inS[7]|I
+Ein[8]||D5G5;|data1in6@1|inS[8]|I
+Ein[9]||D5G5;|data1in6@1|inS[9]|I
+Ein[10]||D5G5;|data1in6@1|inS[10]|I
+Ein[11]||D5G5;|data1in6@1|inS[11]|I
+Ein[12]||D5G5;|data1in6@1|inS[12]|I
+Ein[13]||D5G5;|data1in6@1|inS[13]|I
+Ein[14]||D5G5;|data1in6@1|inS[14]|I
+Ein[15]||D5G5;|data1in6@1|inS[15]|I
+Ein[16]||D5G5;|data1in6@1|inS[16]|I
+Ein[17]||D5G5;|data1in6@1|inS[17]|I
+Ein[18]||D5G5;|data1in6@1|inS[18]|I
+EinS[1]|in[19]|D5G5;|latch1in@0|inS[1]@907770434|I
+Ein[20]||D5G5;|data1in6@0|inS[1]|I
+Ein[21]||D5G5;|data1in6@0|inS[2]|I
+Ein[22]||D5G5;|data1in6@0|inS[3]|I
+Ein[23]||D5G5;|data1in6@0|inS[4]|I
+Ein[24]||D5G5;|data1in6@0|inS[5]|I
+Ein[25]||D5G5;|data1in6@0|inS[6]|I
+Ein[26]||D5G5;|data1in6@0|inS[7]|I
+Ein[27]||D5G5;|data1in6@0|inS[8]|I
+Ein[28]||D5G5;|data1in6@0|inS[9]|I
+Ein[29]||D5G5;|data1in6@0|inS[10]|I
+Ein[30]||D5G5;|data1in6@0|inS[11]|I
+Ein[31]||D5G5;|data1in6@0|inS[12]|I
+Ein[32]||D5G5;|data1in6@0|inS[13]|I
+Ein[33]||D5G5;|data1in6@0|inS[14]|I
+Ein[34]||D5G5;|data1in6@0|inS[15]|I
+Ein[35]||D5G5;|data1in6@0|inS[16]|I
+Ein[36]||D5G5;|data1in6@0|inS[17]|I
+Ein[37]||D5G5;|data1in6@0|inS[18]|I
+Eout[1]||D5G5;|data1in6@1|outS[1]|O
+Eout[2]||D5G5;|data1in6@1|outS[2]|O
+Eout[3]||D5G5;|data1in6@1|outS[3]|O
+Eout[4]||D5G5;|data1in6@1|outS[4]|O
+Eout[5]||D5G5;|data1in6@1|outS[5]|O
+Eout[6]||D5G5;|data1in6@1|outS[6]|O
+Eout[7]||D5G5;|data1in6@1|outS[7]|O
+Eout[8]||D5G5;|data1in6@1|outS[8]|O
+Eout[9]||D5G5;|data1in6@1|outS[9]|O
+Eout[10]||D5G5;|data1in6@1|outS[10]|O
+Eout[11]||D5G5;|data1in6@1|outS[11]|O
+Eout[12]||D5G5;|data1in6@1|outS[12]|O
+Eout[13]||D5G5;|data1in6@1|outS[13]|O
+Eout[14]||D5G5;|data1in6@1|outS[14]|O
+Eout[15]||D5G5;|data1in6@1|outS[15]|O
+Eout[16]||D5G5;|data1in6@1|outS[16]|O
+Eout[17]||D5G5;|data1in6@1|outS[17]|O
+Eout[18]||D5G5;|data1in6@1|outS[18]|O
+EoutS[1]|out[19]|D5G5;|latch1in@0|outS[2]|O
+Eout[20]||D5G5;|data1in6@0|outS[1]|O
+Eout[21]||D5G5;|data1in6@0|outS[2]|O
+Eout[22]||D5G5;|data1in6@0|outS[3]|O
+Eout[23]||D5G5;|data1in6@0|outS[4]|O
+Eout[24]||D5G5;|data1in6@0|outS[5]|O
+Eout[25]||D5G5;|data1in6@0|outS[6]|O
+Eout[26]||D5G5;|data1in6@0|outS[7]|O
+Eout[27]||D5G5;|data1in6@0|outS[8]|O
+Eout[28]||D5G5;|data1in6@0|outS[9]|O
+Eout[29]||D5G5;|data1in6@0|outS[10]|O
+Eout[30]||D5G5;|data1in6@0|outS[11]|O
+Eout[31]||D5G5;|data1in6@0|outS[12]|O
+Eout[32]||D5G5;|data1in6@0|outS[13]|O
+Eout[33]||D5G5;|data1in6@0|outS[14]|O
+Eout[34]||D5G5;|data1in6@0|outS[15]|O
+Eout[35]||D5G5;|data1in6@0|outS[16]|O
+Eout[36]||D5G5;|data1in6@0|outS[17]|O
+Eout[37]||D5G5;|data1in6@0|outS[18]|O
+Etake||D5G2;|pin@2||I
+Evdd_3|vdd|D5G5;|data1in6@1|vdd_3|P
+Evdd_4|vdd_1|D5G5;|data1in6@1|vdd_4|P
+Evdd_5|vdd_2|D5G5;|data1in6@1|vdd_5|P
+Evdd_6|vdd_3|D5G5;|data1in6@1|vdd_6|P
+Evdd_7|vdd_4|D5G5;|data1in6@0|vdd_3|P
+Evdd_8|vdd_5|D5G5;|data1in6@0|vdd_4|P
+Evdd_9|vdd_6|D5G5;|data1in6@0|vdd_5|P
+Evdd_10|vdd_7|D5G5;|data1in6@0|vdd_6|P
+X