migrate jelib->delib

[fleet.git] / chips / marina / electric / scanM.delib / scanCellFtaller.sch

diff --git a/chips/marina/electric/scanM.delib/scanCellFtaller.sch b/chips/marina/electric/scanM.delib/scanCellFtaller.sch
new file mode 100644 (file)
index 0000000..5c58d93
--- /dev/null
+++ b/chips/marina/electric/scanM.delib/scanCellFtaller.sch
@@ -0,0 +1,55 @@
+HscanM|8.10k
+
+# External Libraries:
+
+LlatchesK|latchesK
+
+LorangeTSMC090nm|orangeTSMC090nm
+
+# Cell scanCellFtaller;1{sch}
+CscanCellFtaller;1{sch}||schematic|1194655242436|1243341551766|I
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||-1|-19|||YRRR|
+NOff-Page|conn@1||18|-5||||
+NOff-Page|conn@3||-20|-6|||Y|
+NOff-Page|conn@4||0|13|||R|
+IlatchesK:latch1in10A;1{ic}|latch1in@0||-12|-6|||D5G4;
+IlatchesK:latch2in10Alo;1{ic}|latch2in@0||6|-5|||D5G4;
+IlatchesK:latch2in10Alomc;1{ic}|latch2in@1||7|9|XY||D5G4;
+Ngeneric:Invisible-Pin|pin@0||0.5|50.5|||||ART_message(D5G5;)SscanCellFtaller
+Ngeneric:Invisible-Pin|pin@1||1|46.5|||||ART_message(D5G3;)Sies 10 November 2007
+Ngeneric:Invisible-Pin|pin@2||1|29.5|||||ART_message(D5G3;)S[this is a read/write scan cell,with internal data latch]
+Ngeneric:Invisible-Pin|pin@3||2.5|24|||||ART_message(D5G3;)Ss[1:9] = sin,phi2,phi1,wr, rd, phi1_return, phi2_return, sin_return, mc
+NWire_Pin|pin@5||0|-4||||
+NWire_Pin|pin@7||-13|-14||||
+NWire_Pin|pin@10||5|-14||||
+NWire_Pin|pin@11||5|2||||
+NWire_Pin|pin@12||8|1||||
+NWire_Pin|pin@13||0|9||||
+NWire_Pin|pin@14||13|9||||
+NWire_Pin|pin@16||13|-5||||
+NWire_Pin|pin@17||8|16||||
+Ngeneric:Invisible-Pin|pin@18||1|39.5|||||ART_message(D5G3;)S[this is a shape variant of scanCellF,19 May 2009]
+IscanCellFtaller;1{ic}|scanCell@1||29|8.5|||D5G4;
+IorangeTSMC090nm:wire90;1{ic}|wire90@0||-3|-6|||D0G4;|ATTR_L(D5G1;PUD)D297.6|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+Awire|mc|D5G2;||2700|latch2in@1|mc|8|12|pin@17||8|16
+Awire|net@0|||1800|latch2in@0|out[1]|9|-5|pin@16||13|-5
+Awire|net@1|||0|latch1in@0|in[1]|-15|-6|conn@3|y|-18|-6
+Awire|net@2|||1800|latch1in@0|out[1]|-9|-6|wire90@0|a|-5.5|-6
+Awire|net@10|||1800|wire90@0|b|-0.5|-6|latch2in@0|inA[1]|3|-6
+Awire|net@11|||1800|pin@5||0|-4|latch2in@0|inB[1]|3|-4
+Awire|net@14|||900|pin@13||0|9|pin@5||0|-4
+Awire|net@15|||900|conn@4|a|0|11|pin@13||0|9
+Awire|net@16|||0|latch2in@1|out[1]|4|9|pin@13||0|9
+Awire|net@17|||1800|latch2in@1|inA[1]|10|9|pin@14||13|9
+Awire|net@19|||1800|pin@16||13|-5|conn@1|a|16|-5
+Awire|net@21|||900|pin@14||13|9|pin@16||13|-5
+Awire|p1p|D5G2;||900|latch2in@0|hcl[A]|5|-8|pin@10||5|-14
+Awire|p2p|D5G2;||900|latch1in@0|hcl|-13|-9|pin@7||-13|-14
+Awire|rd|D5G2;||2700|latch2in@0|hcl[B]|5|-2|pin@11||5|2
+Awire|wr|D5G2;||900|latch2in@1|hcl|8|6|pin@12||8|1
+Edout[1]||D6G2;|conn@4|y|O
+Ep2p,p1p,wr,rd,mc||D4G2;|conn@0|a|I
+Esin||D4G2;|conn@3|a|I
+Esout||D6G2;|conn@1|y|O
+X