migrate jelib->delib

[fleet.git] / chips / marina / electric / scanM.delib / scanFx3Lshape.sch

diff --git a/chips/marina/electric/scanM.delib/scanFx3Lshape.sch b/chips/marina/electric/scanM.delib/scanFx3Lshape.sch
new file mode 100644 (file)
index 0000000..d501dab
--- /dev/null
+++ b/chips/marina/electric/scanM.delib/scanFx3Lshape.sch
@@ -0,0 +1,61 @@
+HscanM|8.10k
+
+# External Libraries:
+
+LorangeTSMC090nm|orangeTSMC090nm
+
+# Cell scanFx3Lshape;1{sch}
+CscanFx3Lshape;1{sch}||schematic|1194655242436|1243341551766|I
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||-38|-15|||YRRR|
+NOff-Page|conn@4||-24|13|||R|
+NOff-Page|conn@5||0|13|||R|
+NOff-Page|conn@6||24|13|||R|
+NWire_Con|conn@7||-38|-5||||
+NOff-Page|conn@8||-38|11|||R|
+Ngeneric:Invisible-Pin|pin@0||0.5|44.5|||||ART_message(D5G5;)SscanCellFx3
+Ngeneric:Invisible-Pin|pin@1||1|40.5|||||ART_message(D5G3;)Sies 10 November 2007
+Ngeneric:Invisible-Pin|pin@2||1|29.5|||||ART_message(D5G3;)S[this is a read/write scan cell,with internal data latch]
+Ngeneric:Invisible-Pin|pin@3||2.5|24|||||ART_message(D5G3;)Ss[1:9] = sin,phi2,phi1,wr, rd, phi1_return, phi2_return, sin_return, mc
+NBus_Pin|pin@30||-38|-10|-1|-1||
+NBus_Pin|pin@31||-38|3|-1|-1||
+NWire_Pin|pin@32||-34|0||||
+NWire_Pin|pin@33||-34|-5||||
+NWire_Pin|pin@34||37|0||||
+NWire_Pin|pin@35||37|5||||
+NBus_Pin|pin@37||-24|-8|-1|-1||
+NBus_Pin|pin@38||24|-8|-1|-1||
+NBus_Pin|pin@39||0|-13|-1|-1||
+NBus_Pin|pin@40||0|-8|-1|-1||
+Ngeneric:Invisible-Pin|pin@41||1|36.5|||||ART_message(D5G3;)Smultiple layouts 21 February 2009
+IscanCellF;1{ic}|scanCell@5||0|0|||D5G4;
+IscanCellF;1{ic}|scanCell@6||24|0|||D5G4;
+IscanCellF;1{ic}|scanCell@8||-24|0|||D5G4;
+IscanFx3Lshape;1{ic}|scanFx3L@0||48|12|||D5G4;
+IorangeTSMC090nm:wire90;1{ic}|wire90@0||-11|0|||D0G4;|ATTR_L(D5G1;PUD)D297.6|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@1||13|0|||D0G4;|ATTR_L(D5G1;PUD)D297.6|ATTR_LEWIRE(P)I1|ATTR_layer(D5G1;NPY-1;)I1|ATTR_width(D5G1;NPY-2;)I3
+Awire|net@30|||0|wire90@0|a|-13.5|0|scanCell@8|sout|-16|0
+Awire|net@31|||1800|scanCell@5|sout|8|0|wire90@1|a|10.5|0
+Awire|net@32|||1800|wire90@0|b|-8.5|0|scanCell@5|sin|-7|0
+Awire|net@33|||0|scanCell@6|sin|17|0|wire90@1|b|15.5|0
+Awire|net@34|||900|conn@4|a|-24|11|scanCell@8|dout[1]|-24|7
+Awire|net@35|||2700|scanCell@6|dout[1]|24|7|conn@6|a|24|11
+Awire|net@36|||2700|scanCell@5|dout[1]|0|7|conn@5|a|0|11
+Awire|net@39|||0|scanCell@8|sin|-31|0|pin@32||-34|0
+Awire|net@41|||1800|scanCell@6|sout|32|0|pin@34||37|0
+Abus|net@44||-0.5|IJ900|scanCell@8|p2p,p1p,wr,rd,mc|-24|-4|pin@37||-24|-8
+Abus|net@45||-0.5|IJ1800|pin@40||0|-8|pin@38||24|-8
+Abus|net@46||-0.5|IJ2700|pin@38||24|-8|scanCell@6|p2p,p1p,wr,rd,mc|24|-4
+Abus|net@48||-0.5|IJ1800|pin@37||-24|-8|pin@40||0|-8
+Abus|net@49||-0.5|IJ900|scanCell@5|p2p,p1p,wr,rd,mc|0|-4|pin@40||0|-8
+Awire|sic[1]|D5G2;||900|pin@32||-34|0|pin@33||-34|-5
+Abus|sic[2,3,4,5,9]|D5G2;|-0.5|IJ900|pin@40||0|-8|pin@39||0|-13
+Abus|sic[2:9]|D5G2;|-0.5|IJ900|conn@7||-38|-5|pin@30||-38|-10
+Awire|soc[1]|D5G2;||2700|pin@34||37|0|pin@35||37|5
+Abus|soc[2:9]|D5G2;|-0.5|IJ2700|conn@7||-38|-5|pin@31||-38|3
+Edout[1]||D6G2;|conn@4|y|O
+Edout[2]||D6G2;|conn@5|y|O
+Edout[3]||D6G2;|conn@6|y|O
+Esic[1:9]||D4G2;|conn@0|a|B
+Esoc[1:9]||D6G2;|conn@8|y|B
+X