migrate jelib->delib

[fleet.git] / chips / marina / electric / stagesM.delib / altStartDockStage.sch

diff --git a/chips/marina/electric/stagesM.delib/altStartDockStage.sch b/chips/marina/electric/stagesM.delib/altStartDockStage.sch
new file mode 100644 (file)
index 0000000..ace5484
--- /dev/null
+++ b/chips/marina/electric/stagesM.delib/altStartDockStage.sch
@@ -0,0 +1,91 @@
+HstagesM|8.10k
+
+# External Libraries:
+
+LdriversM|driversM
+
+LgaspM|gaspM
+
+LorangeTSMC090nm|orangeTSMC090nm
+
+LregistersM|registersM
+
+LscanM|scanM
+
+LwiresL|wiresL
+
+# Cell altStartDockStage;1{sch}
+CaltStartDockStage;1{sch}||schematic|1227452321533|1243246708862|I
+IaltStartDockStage;1{ic}|altStart@0||-27|15|||D5G4;
+IgaspM:anAltStart;1{ic}|anAltSta@1||0|0|||D5G4;
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||9|2|||Y|
+NOff-Page|conn@1||-9|0|||XRR|
+NOff-Page|conn@3||9|-2|||Y|
+NOff-Page|conn@7||-11|-18||||
+NOff-Page|conn@8||19|-18||||
+NOff-Page|conn@10||18|-48||||
+NOff-Page|conn@11||-10|14|||XYRR|
+NOff-Page|conn@12||23|14|||XRR|
+IregistersM:ins1in20Bx36;1{ic}|ins1in20@0||8|-18|||D5G4;
+IregistersM:ins1in20Bx36;1{ic}|ins1in20@1||8|-48|Y||D5G4;
+IdriversM:latchDriver60;1{ic}|latchDri@2||-7|-27|||D5G4;
+IdriversM:latchDriver60;1{ic}|latchDri@3||-8|-39|||D5G4;
+Ngeneric:Invisible-Pin|pin@3||2.5|32|||||ART_message(D5G4;)Sto start the alternator
+Ngeneric:Invisible-Pin|pin@4||1|37.5|||||ART_message(D5G6;)SaltStartDockStage
+NWire_Pin|pin@6||-24|-21||||
+NWire_Pin|pin@7||-24|-27||||
+NWire_Pin|pin@8||-24|-39||||
+NWire_Pin|pin@9||-24|-43||||
+NBus_Pin|pin@10||0|-11|-1|-1||
+NWire_Pin|pin@15||-1|7||||
+NWire_Pin|pin@16||-3|7||||
+NWire_Pin|pin@17||6|-27||||
+NWire_Pin|pin@18||6|-39||||
+NBus_Pin|pin@19||-3|-48|-1|-1||
+NBus_Pin|pin@20||-3|-44|-1|-1||
+NWire_Pin|pin@29||-3|19||||
+Ngeneric:Invisible-Pin|pin@30||-0.5|27|||||ART_message(D5FLeave alone;G3;)Sies 3 April 2009
+IscanM:scanEx2;1{ic}|scanEx2v@1||3|14|XR||D5G4;
+IwiresL:tranCap;1{ic}|tc[1:2]|D5G1;X2;Y2;|31|2|||D5G4;
+IorangeTSMC090nm:wire90;1{ic}|wire90@0||-15.5|-27|||D0G4;|ATTR_L(D5FLeave alone;G1;PUD)D1300.0|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NPY-1;)I1|ATTR_width(D5FLeave alone;G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@1||-19|-39|||D0G4;|ATTR_L(D5FLeave alone;G1;PUD)D1301.8999999999999|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NPY-1;)I1|ATTR_width(D5FLeave alone;G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@2||1.5|-27|||D0G4;|ATTR_L(D5FLeave alone;G1;PUD)D1300.0|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NPY-1;)I1|ATTR_width(D5FLeave alone;G1;NPY-2;)I3
+IorangeTSMC090nm:wire90;1{ic}|wire90@3||1.5|-39|||D0G4;|ATTR_L(D5FLeave alone;G1;PUD)D1300.0|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NPY-1;)I1|ATTR_width(D5FLeave alone;G1;NPY-2;)I3
+Abus|fire[A,B]|D5G2;|-0.5|IJ900|anAltSta@1|fire[A,B]|0|-4|pin@10||0|-11
+Awire|fire[A]|D5G2;||900|pin@6||-24|-21|pin@7||-24|-27
+Awire|fire[B]|D5G2;||2700|pin@9||-24|-43|pin@8||-24|-39
+Abus|in[1:36]|D5G2;|-0.5|IJ2700|pin@19||-3|-48|pin@20||-3|-44
+Awire|net@0|||1800|conn@1|y|-7|0|anAltSta@1|pred|-3|0
+Awire|net@1|||0|conn@0|a|7|2|anAltSta@1|succA|3|2
+Awire|net@2|||0|conn@3|a|7|-2|anAltSta@1|succB|3|-2
+Awire|net@3|||1800|pin@7||-24|-27|wire90@0|a|-18|-27
+Awire|net@4|||1800|pin@8||-24|-39|wire90@1|a|-21.5|-39
+Awire|net@5|||1800|wire90@0|b|-13|-27|latchDri@2|in|-11|-27
+Awire|net@6|||0|latchDri@3|in|-12|-39|wire90@1|b|-16.5|-39
+Awire|net@10|||2700|anAltSta@1|mc|-1|4|pin@15||-1|7
+Awire|net@11|||0|pin@15||-1|7|pin@16||-3|7
+Abus|net@13||-0.5|IJ0|ins1in20@0|in[1:36]|5|-18|conn@7|y|-9|-18
+Abus|net@14||-0.5|IJ1800|ins1in20@0|out[1:36]|11|-18|conn@8|a|17|-18
+Abus|net@16||-0.5|IJ1800|ins1in20@1|out[1:36]|11|-48|conn@10|a|16|-48
+Awire|net@20|||1800|latchDri@2|out|-3|-27|wire90@2|a|-1|-27
+Awire|net@22|||1800|latchDri@3|out|-4|-39|wire90@3|a|-1|-39
+Awire|net@23|||1800|wire90@2|b|4|-27|pin@17||6|-27
+Awire|net@24|||2700|pin@17||6|-27|ins1in20@0|hcl[1]|6|-21
+Awire|net@25|||1800|wire90@3|b|4|-39|pin@18||6|-39
+Awire|net@26|||900|pin@18||6|-39|ins1in20@1|hcl[1]|6|-45
+Abus|net@27||-0.5|IJ0|ins1in20@1|in[1:36]|5|-48|pin@19||-3|-48
+Abus|net@28||-0.5|IJ1800|conn@11|y|-8|14|scanEx2v@1|sir[1:9]|1|14
+Abus|net@47||-0.5|IJ1800|scanEx2v@1|sor[1:9]|5|14|conn@12|a|21|14
+Abus|net@48||-0.5|IJ900|scanEx2v@1|dIn[1,2]|1|9|anAltSta@1|s[1:2]|1|4
+Awire|net@50|||1800|pin@29||-3|19|scanEx2v@1|mc|2|19
+Awire|net@51|||2700|pin@16||-3|7|pin@29||-3|19
+Ein[1:36]||D4G2;|conn@7|a|I
+EoutA[1:36]||D6G2;|conn@8|y|O
+EoutB[1:36]||D6G2;|conn@10|y|O
+Epred||D4G2;|conn@1|a|I
+Esir[1:9]||D4G2;|conn@11|a|I
+Esor[1:9]||D6G2;|conn@12|y|O
+EsuccA||D6G2;|conn@0|y|O
+EsuccB||D6G2;|conn@3|y|O
+X