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migrate jelib->delib
[fleet.git] / chips / marina / electric / stagesM.delib / sourceStage.lay
diff --git a/chips/marina/electric/stagesM.delib/sourceStage.lay b/chips/marina/electric/stagesM.delib/sourceStage.lay
new file mode 100644 (file)
index 0000000..ad2b7b2
--- /dev/null
+++ b/chips/marina/electric/stagesM.delib/sourceStage.lay
@@ -0,0 +1,137 @@
+HstagesM|8.10k
+
+# External Libraries:
+
+LcoversM|coversM
+
+LgaspM|gaspM
+
+LscanM|scanM
+
+LwiresL|wiresL
+
+# Cell sourceStage;1{lay}
+CsourceStage;1{lay}||cmos90|1237909988162|1243246708862|I
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NX-Metal-1-Metal-2-Con|contact@0||-122|-66||||
+NX-Metal-1-Metal-2-Con|contact@1||1698.5|-66||||
+NX-Metal-2-Metal-3-Con|contact@2||1680|-60||||
+IcoversM:cover1h;2{lay}|cover1h@1||0|0|||D5G4;
+IgaspM:gaspSource;1{lay}|gaspSour@0||0|0|||D5G4;
+NMetal-2-Pin|pin@1||1600|-66||||
+NMetal-2-Pin|pin@2||1600|-60||||
+IscanM:scanEx1vertA;3{lay}|scanEx1v@0||1656|0|||D5G4;
+IwiresL:select144;1{lay}|select14@0||-1656|0|||D5G4;
+IwiresL:select144;1{lay}|select14@2||1512|0|||D5G4;
+IwiresL:select144;1{lay}|select14@3||1368|0|||D5G4;
+IwiresL:select144;1{lay}|select14@4||1224|0|||D5G4;
+IwiresL:select144;1{lay}|select14@5||1080|0|||D5G4;
+IwiresL:select144;1{lay}|select14@6||936|0|||D5G4;
+IwiresL:select144;1{lay}|select14@7||792|0|||D5G4;
+IwiresL:select144;1{lay}|select14@8||648|0|||D5G4;
+IwiresL:select144;1{lay}|select14@9||504|0|||D5G4;
+IwiresL:select144;1{lay}|select14@10||360|0|||D5G4;
+IwiresL:select144;1{lay}|select14@11||216|0|||D5G4;
+IwiresL:select144;1{lay}|select14@12||-1512|0|||D5G4;
+IwiresL:select144;1{lay}|select14@13||-1368|0|||D5G4;
+IwiresL:select144;1{lay}|select14@14||-1224|0|||D5G4;
+IwiresL:select144;1{lay}|select14@15||-1080|0|||D5G4;
+IwiresL:select144;1{lay}|select14@16||-936|0|||D5G4;
+IwiresL:select144;1{lay}|select14@17||-792|0|||D5G4;
+IwiresL:select144;1{lay}|select14@18||-648|0|||D5G4;
+IwiresL:select144;1{lay}|select14@19||-504|0|||D5G4;
+IwiresL:select144;1{lay}|select14@20||-360|0|||D5G4;
+IwiresL:select144;1{lay}|select14@21||-216|0|||D5G4;
+Ametal-2|net@0||6.2|S1800|gaspSour@0|gnd_2|151.5|0|scanEx1v@0|gnd|1584|0
+Ametal-2|net@1||6.2|S0|scanEx1v@0|vdd_2|1584|50|gaspSour@0|vdd_6|151.5|50
+Ametal-2|net@2||6.2|S0|scanEx1v@0|vdd|1584|-50|gaspSour@0|vdd_7|151.5|-50
+Ametal-1|net@11|||S900|gaspSour@0|out|-122|-7|contact@0||-122|-66
+Ametal-2|net@12|||S1800|contact@0||-122|-66|pin@1||1600|-66
+Ametal-2|net@13|||S1800|gaspSour@0|mc|-123|-60|pin@2||1600|-60
+Ametal-2|net@14|||S1800|pin@1||1600|-66|contact@1||1698.5|-66
+Ametal-1|net@15|||S900|scanEx1v@0|dIn[1]|1698.5|-7|contact@1||1698.5|-66
+Ametal-2|net@16|||S1800|pin@2||1600|-60|contact@2||1680|-60
+Ametal-3|net@17|||S900|scanEx1v@0|mc|1680|-25|contact@2||1680|-60
+Ametal-2|net@18||6.2|S0|gaspSour@0|vdd_3|-151.5|50|cover1h@1|vdd|-1800|50
+Ametal-2|net@19||6.2|S1800|cover1h@1|gnd|-1800|0|gaspSour@0|gnd_1|-151.5|0
+Ametal-2|net@20||6.2|S1800|cover1h@1|vdd_4|-1800|-50|gaspSour@0|vdd_2|-151.5|-50
+Ametal-2|net@21||6.2|S1800|scanEx1v@0|vdd_1|1728|-50|cover1h@1|vdd_5|1800|-50
+Ametal-2|net@22||6.2|S0|cover1h@1|gnd_1|1800|0|scanEx1v@0|gnd_1|1728|0
+Ametal-2|net@23||6.2|S0|cover1h@1|vdd_1|1800|50|scanEx1v@0|vdd_3|1728|50
+Egnd||D5G7;|cover1h@1|gnd_6|G
+Egnd_2||D5G7;|cover1h@1|gnd_2|G
+Egnd_3||D5G7;|cover1h@1|gnd_3|G
+Egnd_4||D5G7;|cover1h@1|gnd_4|G
+Egnd_5||D5G7;|cover1h@1|gnd_5|G
+Egnd_7||D5G7;|cover1h@1|gnd_7|G
+Egnd_8||D5G7;|cover1h@1|gnd_8|G
+Egnd_9||D5G7;|cover1h@1|gnd_9|G
+Egnd_10||D5G7;|cover1h@1|gnd_10|G
+Egnd_11||D5G7;|cover1h@1|gnd_11|G
+Egnd_12||D5G7;|cover1h@1|gnd_12|G
+Egnd_13||D5G7;|cover1h@1|gnd_13|G
+Egnd_14||D5G7;|cover1h@1|gnd_14|G
+Egnd_15||D5G7;|cover1h@1|gnd_15|G
+Egnd_16||D5G7;|cover1h@1|gnd_16|G
+Egnd_17||D5G7;|cover1h@1|gnd_17|G
+Egnd_18||D5G7;|cover1h@1|gnd_18|G
+Egnd_19||D5G7;|cover1h@1|gnd_19|G
+Egnd_20||D5G7;|cover1h@1|gnd_20|G
+Egnd_21||D5G7;|cover1h@1|gnd_21|G
+Egnd_22||D5G7;|cover1h@1|gnd_22|G
+Egnd_23||D5G7;|cover1h@1|gnd_23|G
+Egnd_24||D5G7;|cover1h@1|gnd_24|G
+Egnd_25||D5G7;|cover1h@1|gnd_25|G
+Egnd_26||D5G7;|cover1h@1|gnd_26|G
+Egnd_27||D5G7;|cover1h@1|gnd_27|G
+Egnd_28||D5G7;|cover1h@1|gnd_28|G
+Egnd_29||D5G7;|cover1h@1|gnd_29|G
+Esir[1]||D5G2;|scanEx1v@0|sir[1]|I
+Esir[2]||D5G2;|scanEx1v@0|sir[2]|B
+Esir[3]||D5G2;|scanEx1v@0|sir[3]|B
+Esir[4]||D5G2;|scanEx1v@0|sir[4]|B
+Esir[5]||D5G2;|scanEx1v@0|sir[5]|B
+Esir[6]||D5G2;|scanEx1v@0|sir[6]|B
+Esir[7]||D5G2;|scanEx1v@0|sir[7]|B
+Esir[8]||D5G2;|scanEx1v@0|sir[8]|B
+Esir[9]||D5G2;|scanEx1v@0|sir[9]|B
+Esor[1]||D5G2;|scanEx1v@0|sor[1]|O
+Esor[2]||D5G2;|scanEx1v@0|sor[2]|B
+Esor[3]||D5G2;|scanEx1v@0|sor[3]|B
+Esor[4]||D5G2;|scanEx1v@0|sor[4]|B
+Esor[5]||D5G2;|scanEx1v@0|sor[5]|B
+Esor[6]||D5G2;|scanEx1v@0|sor[6]|B
+Esor[7]||D5G2;|scanEx1v@0|sor[7]|B
+Esor[8]||D5G2;|scanEx1v@0|sor[8]|B
+Esor[9]||D5G2;|scanEx1v@0|sor[9]|B
+Esucc||D5G2;|gaspSour@0|succ|I
+Etok||D5G2;|gaspSour@0|inA|I
+Evdd||D5G7;|cover1h@1|vdd_2|P
+Evdd_3||D5G2;|scanEx1v@0|vdd_3|P
+Evdd_6||D5G7;|cover1h@1|vdd_6|P
+Evdd_7||D5G7;|cover1h@1|vdd_7|P
+Evdd_8||D5G7;|cover1h@1|vdd_8|P
+Evdd_9||D5G7;|cover1h@1|vdd_9|P
+Evdd_10||D5G7;|cover1h@1|vdd_10|P
+Evdd_11||D5G7;|cover1h@1|vdd_11|P
+Evdd_12||D5G7;|cover1h@1|vdd_12|P
+Evdd_13||D5G7;|cover1h@1|vdd_13|P
+Evdd_14||D5G7;|cover1h@1|vdd_14|P
+Evdd_15||D5G7;|cover1h@1|vdd_15|P
+Evdd_16||D5G7;|cover1h@1|vdd_16|P
+Evdd_17||D5G7;|cover1h@1|vdd_17|P
+Evdd_18||D5G7;|cover1h@1|vdd_18|P
+Evdd_19||D5G7;|cover1h@1|vdd_19|P
+Evdd_20||D5G7;|cover1h@1|vdd_20|P
+Evdd_21||D5G7;|cover1h@1|vdd_21|P
+Evdd_22||D5G7;|cover1h@1|vdd_22|P
+Evdd_23||D5G7;|cover1h@1|vdd_23|P
+Evdd_24||D5G7;|cover1h@1|vdd_24|P
+Evdd_25||D5G7;|cover1h@1|vdd_25|P
+Evdd_26||D5G7;|cover1h@1|vdd_26|P
+Evdd_27||D5G7;|cover1h@1|vdd_27|P
+Evdd_28||D5G7;|cover1h@1|vdd_28|P
+Evdd_29||D5G2;|gaspSour@0|vdd_7|P
+Evdd_30||D5G7;|cover1h@1|vdd_3|P
+Evdd_31||D5G7;|cover1h@1|vdd_29|P
+X
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