migrate jelib->delib

[fleet.git] / chips / omegaCounter / 40nm / electric / omegaCounter-old.delib / inverterStudy.sch

diff --git a/chips/omegaCounter/40nm/electric/omegaCounter-old.delib/inverterStudy.sch b/chips/omegaCounter/40nm/electric/omegaCounter-old.delib/inverterStudy.sch
new file mode 100644 (file)
index 0000000..636c266
--- /dev/null
+++ b/chips/omegaCounter/40nm/electric/omegaCounter-old.delib/inverterStudy.sch
@@ -0,0 +1,49 @@
+HomegaCounter-old|8.10k
+
+# External Libraries:
+
+Lorange40nm|orange40nm
+
+LpurpleFive|purpleFive
+
+# Cell inverterStudy;1{sch}
+CinverterStudy;1{sch}||schematic|1252801918221|1252892550179|
+IpurpleFive:LEsettings;1{ic}|LEsettin@8||11|-10|||D5G4;|ATTR_LESETTINGS(D5G1;NPY-3.75;)I1|ATTR_alpha(D5G1;NPY-1.75;)F0.7|ATTR_epsilon(D5G1;NPY1.25;)F0.0010|ATTR_gate_cap(D5G1;NPY-0.75;)F0.19|ATTR_keeper_ratio(D5G1;NPY-2.75;)F0.1|ATTR_max_iter(D5G1;NPY0.25;)I30|ATTR_su(D5G1;NPY3.25;)F4.7|ATTR_wire_ratio(D5G1;NPY2.25;)F0.16|ATTR_x1inverter_length(D5G1;P)F2.0|ATTR_x1inverter_nwidth(D5G1;P)F3.0|ATTR_x1inverter_pwidth(D5G1;P)F6.0
+Ngeneric:Facet-Center|art@0||0|0||||AV
+IpurpleFive:inv;1{ic}|inv@5||-18|-3|R||D5G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_LEGATE(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NOJPX1.5;Y2;)SLE.getdrive()|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_su(P)I-1
+IpurpleFive:inv;1{ic}|inv@6||5|-2|RRR||D5G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_LEGATE(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NOJPX1.5;Y2;)SLE.getdrive()|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_su(P)I-1
+IpurpleFive:inv;1{ic}|inv@7||-6|7|||D5G4;|ATTR_Delay(D5G1;NOJPX2;Y-2;)S100|ATTR_LEGATE(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NOJPX1.5;Y2;)SLE.getdrive()|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1|ATTR_su(P)I-1
+NWire_Pin|pin@0||-18|5||||
+NWire_Pin|pin@1||5|5||||
+NWire_Pin|pin@6||-27|5||||
+NWire_Pin|pin@7||-27|10||||
+NWire_Pin|pin@8||-15|10||||
+NWire_Pin|pin@9||-15|7||||
+NWire_Pin|pin@10||0|7||||
+NWire_Pin|pin@11||11|10||||
+NWire_Pin|pin@12||11|7||||
+NWire_Pin|pin@13||11|5||||
+NWire_Pin|pin@14||-18|-9||||
+NWire_Pin|pin@15||5|-9||||
+Iorange40nm:wire40;1{ic}|wire40@0||-21.5|10|||D5G4;|ATTR_L(D5FLeave alone;G1;PUD)D973.5|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NOLPY-1;)S2|ATTR_width(D5FLeave alone;G1;NOLPY-2;)S7
+Iorange40nm:wire40;1{ic}|wire40@1||5.5|10|||D5G4;|ATTR_L(D5FLeave alone;G1;PUD)D985.5|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NOLPY-1;)S2|ATTR_width(D5FLeave alone;G1;NOLPY-2;)S7
+Iorange40nm:wire40;1{ic}|wire40@2||-7.5|-9|||D5G4;|ATTR_L(D5FLeave alone;G1;PUD)D976.5|ATTR_LEWIRE(P)I1|ATTR_layer(D5FLeave alone;G1;NOLPY-1;)S2|ATTR_width(D5FLeave alone;G1;NOLPY-2;)S7
+Awire|net@0|||2700|inv@5|out|-18|-0.5|pin@0||-18|5
+Awire|net@2|||2700|inv@6|in|5|0.5|pin@1||5|5
+Awire|net@10|||0|pin@0||-18|5|pin@6||-27|5
+Awire|net@11|||2700|pin@6||-27|5|pin@7||-27|10
+Awire|net@12|||1800|pin@7||-27|10|wire40@0|a|-24|10
+Awire|net@13|||1800|wire40@0|b|-19|10|pin@8||-15|10
+Awire|net@14|||900|pin@8||-15|10|pin@9||-15|7
+Awire|net@15|||1800|pin@9||-15|7|inv@7|in|-8.5|7
+Awire|net@16|||1800|inv@7|out|-3.5|7|pin@10||0|7
+Awire|net@17|||2250|pin@10||0|7|wire40@1|a|3|10
+Awire|net@18|||1800|wire40@1|b|8|10|pin@11||11|10
+Awire|net@19|||900|pin@11||11|10|pin@12||11|7
+Awire|net@20|||900|pin@12||11|7|pin@13||11|5
+Awire|net@21|||1800|pin@1||5|5|pin@13||11|5
+Awire|net@22|||0|wire40@2|a|-10|-9|pin@14||-18|-9
+Awire|net@23|||900|inv@5|in|-18|-5.5|pin@14||-18|-9
+Awire|net@24|||1800|wire40@2|b|-5|-9|pin@15||5|-9
+Awire|net@25|||900|inv@6|out|5|-4.5|pin@15||5|-9
+X