migrate jelib->delib

[fleet.git] / chips / omegaCounter / 40nm / electric / omegaCounter.delib / nor3oai.lay

diff --git a/chips/omegaCounter/40nm/electric/omegaCounter.delib/nor3oai.lay b/chips/omegaCounter/40nm/electric/omegaCounter.delib/nor3oai.lay
new file mode 100644 (file)
index 0000000..81310b8
--- /dev/null
+++ b/chips/omegaCounter/40nm/electric/omegaCounter.delib/nor3oai.lay
@@ -0,0 +1,40 @@
+HomegaCounter|8.10k
+
+# Cell nor3oai;1{lay}
+Cnor3oai;1{lay}||tsmcSun40GP|1253739194128|1254271736643||ATTR_NCC(D5G10;NTX1;Y184;)S["exportsConnectedByParent vdd /vdd_[0-9]+/","exportsConnectedByParent gnd /gnd_[0-9]+/","exportsConnectedByParent vdd_when_not_disabled /vdd_when_not_disabled_[0-9]+/","exportsConnectedByParent disableLO /disableLO_[0-9]+/","exportsConnectedByParent disable /disable_[0-9]+/","exportsConnectedByParent out /out_[0-9]+/"]|DRC_last_good_drc_area_date()G1254271717453|DRC_last_good_drc_bit()I34|DRC_last_good_drc_date()G1254271742955
+Ngeneric:Facet-Center|art@0||0|0||||AV
+Inor3;2{lay}|nor3@0||94|-8.5|||D5G4;
+Ioai;3{lay}|oai@0||-14|-8.5|||D5G4;
+NMetal-2-Pin|pin@3||148|111.5||||
+NMetal-1-Pin|pin@6||94|-34||||
+NN-Well-Node|plnode@0||58|74.5|174|136||A
+NNPlus-Node|plnode@1||-5|-83.5|294|112||A
+NPPlus-Node|plnode@2||58|74.5|168|136||A
+AMetal-2|net@0|||S1800|nor3@0|vdd_1|40|96.5|oai@0|vdd_4|76|96.5
+AMetal-2|net@1|||S0|oai@0|vdd_3|76|66.5|nor3@0|vdd_when_not_disabled_1|40|66.5
+AMetal-2|net@2|||S0|oai@0|vdd_5|76|36.5|nor3@0|vdd_2|40|36.5
+AMetal-2|net@3|||S0|oai@0|gnd_9|76|-53.5|nor3@0|gnd_7|39.5|-53.5
+AMetal-2|net@4|||S0|oai@0|gnd|76|-83.5|nor3@0|gnd_6|39.5|-83.5
+AMetal-2|net@5|||S0|oai@0|gnd_10|76|-113.5|nor3@0|gnd_5|39.5|-113.5
+AMetal-2|net@17|||S0|pin@3||148|111.5|nor3@0|gnd_11|40|111.5
+AMetal-1|net@26|||S0|nor3@0|out1|94|14|oai@0|ina|32|14
+AMetal-1|net@29|||S2700|nor3@0|out2|94|-41|pin@6||94|-34
+AMetal-1|net@30|||S1800|oai@0|in2|64|-34|pin@6||94|-34
+Edisable||D5G2;|nor3@0|inc|I
+Egnd||D5G2;|nor3@0|gnd|G
+Egnd_5||D5G2;|oai@0|gnd_5|U
+Egnd_6||D5G2;|oai@0|gnd_6|U
+Egnd_7||D5G2;|oai@0|gnd_7|U
+Egnd_9||D5G2;|nor3@0|gnd_9|U
+Egnd_10||D5G2;|nor3@0|gnd_10|G
+Evdd_when_not_disabled_1|highWhenNotDisabled|D5G2;|pin@3||I
+Eina|inAnd1|D5G2;|nor3@0|ina|I
+Einb|inAnd2|D5G2;|nor3@0|inb|I
+Einb_1|inOr1|D5G2;|oai@0|ina_3|I
+Einc_1|inOr2|D5G2;|oai@0|inb_1|I
+Eout_1|out|D5G2;|oai@0|out_1|O
+Eout_2||D5G2;|oai@0|out_2|O
+Evdd_3|vdd|D5G2;|nor3@0|vdd_3|G
+Evdd_4||D5G2;|nor3@0|vdd_4|G
+Evdd_5||D5G2;|nor3@0|vdd_5|G
+X