migrate jelib->delib

[fleet.git] / chips / omegaCounter / 40nm / electric / orange40nm.delib / R128.sch

diff --git a/chips/omegaCounter/40nm/electric/orange40nm.delib/R128.sch b/chips/omegaCounter/40nm/electric/orange40nm.delib/R128.sch
new file mode 100644 (file)
index 0000000..aa09827
--- /dev/null
+++ b/chips/omegaCounter/40nm/electric/orange40nm.delib/R128.sch
@@ -0,0 +1,34 @@
+Horange40nm|8.10k
+
+# Cell R128;1{sch}
+CR128;1{sch}||schematic|1047945706000|1245967487005||ATTR_L(D5FLeave alone;G1;HNOLPX-22.5;Y-0.75;)S40|ATTR_W(D5FLeave alone;G1;HNOLPX-22.25;Y-1.75;)S40|ATTR_CDL_template(D5G1;NTX-2.5;Y-14;)SXR$(node_name) $(in) $(out) /rnpolywo l='$(L)*10n' w='$(W)*10n'|ATTR_NCC(D5G1;NTX-1.5;Y-18.5;)SresistorType  N-Poly-RPO-Resistor|ATTR_SPICE_template_assura(D5G1;NTX0.5;Y-23;)SXR$(node_name) $(in) $(out) rnpolywo l='$(L)*10n' w='$(W)*10n'|ATTR_SPICE_template_calibre(D5G1;NTX0.5;Y-21;)SXR$(node_name) $(in) $(out) rnpolywo l='$(L)*10n' w='$(W)*10n'|ATTR_SPICE_template_hspice(D5G1;NTX-1.5;Y-16.25;)SXR$(node_name) $(in) $(out) rnpolywo l='$(L)*10n' w='$(W)*10n'|ATTR_SPICE_template_smartspice(D5G1;NTY-12;)SXR$(node_name) $(in) $(out) rnpolywo l='$(L)*10n' w='$(W)*10n'|prototype_center()I[0,0]
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NCapacitor|cap@0||-5.5|0|||||SCHEM_capacitance(D5FLeave alone;G1.5;OLUCX1.75;Y-1.25;)S(0.265*@W*@L + 8.882*@W + 4.43*@L + 74.42)*1e-18/2
+NCapacitor|cap@1||4.75|0|||||SCHEM_capacitance(D5FLeave alone;G1.5;OLUCX1.75;Y-1.25;)S(0.265*@W*@L + 8.882*@W + 4.43*@L + 74.42)*1e-18/2
+NOff-Page|conn@0||10|5||||
+NOff-Page|conn@1||-11.5|5||||
+IR128;1{ic}|gateResi@0||25.5|7.5|||D0G4;|ATTR_L(D5FLeave alone;G1;NOLPX-2;Y-2.25;)S40|ATTR_W(D5FLeave alone;G1;NOLPX2.25;Y-2.25;)S40
+NGround|gnd@0||0|-8.5||||
+Ngeneric:Invisible-Pin|pin@0||1|20.5|||||ART_message(D5G2;)Sn-type unsilicided polysilicon resistor for TSMC90nm process
+Ngeneric:Invisible-Pin|pin@1||2.5|26.5|||||ART_message(D5G5;)SR128 (rnpolywo)
+NWire_Pin|pin@2||-5.5|5||||
+NWire_Pin|pin@3||-5.5|-4.5||||
+NWire_Pin|pin@4||4.75|5||||
+NWire_Pin|pin@5||4.75|-4.5||||
+Ngeneric:Invisible-Pin|pin@6||1.5|15|||||ART_message(D5G2;)S["minumum recommended dimensions are l=0.4um, w=0.4um",target resistance is approx 128 ohm/sq]
+NWire_Pin|pin@7||0|-4.5||||
+NResistor|res@0||-0.5|5||||1|ATTR_length(D5FLeave alone;G1;NOLY-1;)S@L|ATTR_width(D5FLeave alone;G1;NOLY-2;)S@W|SCHEM_resistance(D5FLeave alone;G2;OLY1.5;)S(@L*128/@W)
+Awire|net@0|||0|pin@2||-5.5|5|conn@1|y|-9.5|5
+Awire|net@1|||1800|pin@4||4.75|5|conn@0|a|8|5
+Awire|net@2|||0|res@0|a|-2.5|5|pin@2||-5.5|5
+Awire|net@3|||2700|cap@0|a|-5.5|2|pin@2||-5.5|5
+Awire|net@4|||900|cap@0|b|-5.5|-2|pin@3||-5.5|-4.5
+Awire|net@6|||1800|res@0|b|1.5|5|pin@4||4.75|5
+Awire|net@7|||2700|cap@1|a|4.75|2|pin@4||4.75|5
+Awire|net@8|||900|cap@1|b|4.75|-2|pin@5||4.75|-4.5
+Awire|net@9|||0|pin@7||0|-4.5|pin@3||-5.5|-4.5
+Awire|net@10|||0|pin@5||4.75|-4.5|pin@7||0|-4.5
+Awire|net@11|||2700|gnd@0||0|-6.5|pin@7||0|-4.5
+Ein||D5G2;|conn@1|y|I
+Eout||D5G2;|conn@0|y|O
+X