migrate jelib->delib

[fleet.git] / chips / omegaCounter / 40nm / electric / purpleFive.delib / invCTLn.sch

diff --git a/chips/omegaCounter/40nm/electric/purpleFive.delib/invCTLn.sch b/chips/omegaCounter/40nm/electric/purpleFive.delib/invCTLn.sch
new file mode 100644 (file)
index 0000000..a45b408
--- /dev/null
+++ b/chips/omegaCounter/40nm/electric/purpleFive.delib/invCTLn.sch
@@ -0,0 +1,25 @@
+HpurpleFive|8.10k
+
+# External Libraries:
+
+LredFive|redFive
+
+# Cell invCTLn;1{sch}
+CinvCTLn;1{sch}||schematic|1021415734000|1159375665094||ATTR_Delay(D5G1;HNPX-12;Y-5;)I100|ATTR_LEGATE(D5G1;HNPTX-12;Y-12;)I1|ATTR_LEPARALLGRP(D5G1;HNPTX-12;Y-8;)I-1|ATTR_X(D5G1;HNOJPX-12;Y-4;)SLE.getdrive()|ATTR_drive0(D5G1;HNPTX-12;Y-10;)Sstrong0|ATTR_drive1(D5G1;HNPTX-12;Y-11;)Sstrong1|ATTR_sloDelay(D5G1;HNPX-12.5;Y-6.25;)I175|ATTR_su(D5G1;HNPTX-12;Y-9;)I-1|prototype_center()I[0,0]
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||0|-7.5|||R|
+NOff-Page|conn@1||12.5|0||||
+NOff-Page|conn@2||-8.5|0||||
+IredFive:invCTLn;1{ic}|invCTLn@0||0|0|||D0G4;|ATTR_Delay(D5G1;NOJPX4.5;Y-1.5;)S@Delay|ATTR_X(D5G1.5;NOJPX1.5;Y2;)S@X|ATTR_sloDelay(D5G1;NOJPX4.5;Y-3;)S@sloDelay
+IinvCTLn;1{ic}|invCTLn@1||27.5|11.5|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_LEGATE(D5G1;NPX2;Y-8;)I1|ATTR_LEPARALLGRP(D5G1;NPX2;Y-4;)I-1|ATTR_X(D5G1.5;NOJPX1.5;Y2;)SLE.getdrive()|ATTR_drive0(D5G1;NPX2;Y-6;)Sstrong0|ATTR_drive1(D5G1;NPX2;Y-7;)Sstrong1|ATTR_sloDelay(D5G1;NPX1.75;Y-3;)I175|ATTR_su(D5G1;NPX2;Y-5;)I-1
+Ngeneric:Invisible-Pin|pin@0||-1|24|||||ART_message(D5G6;)S[invCTLn]
+Ngeneric:Invisible-Pin|pin@1||0|19|||||ART_message(D5G2;)S[current starved inverter]
+Ngeneric:Invisible-Pin|pin@2||0.5|17|||||ART_message(D5G2;)S[only low-going output transition is affected]
+Ngeneric:Invisible-Pin|pin@3||21|-8.5|||||ART_message(D5G2;)S[X is drive strength]
+Awire|net@0|||900|invCTLn@0|ctl|0|-2|conn@0|y|0|-5.5
+Awire|net@1|||0|conn@1|a|10.5|0|invCTLn@0|out|2.5|0
+Awire|net@2|||1800|conn@2|y|-6.5|0|invCTLn@0|in|-2.5|0
+Ectl||D5G2;|conn@0|a|I|ATTR_le(D5G1;NX-0.5;Y-1.5;)F0.666
+Ein||D5G2;|conn@2|a|I|ATTR_le(D5G1;NX-0.5;Y-1.5;)F1.33
+Eout||D5G2;|conn@1|y|O|ATTR_le(D5G1;NX-0.5;Y2;)F1.33
+X