migrate jelib->delib

[fleet.git] / chips / omegaCounter / 40nm / electric / purpleFive.delib / invK.sch

diff --git a/chips/omegaCounter/40nm/electric/purpleFive.delib/invK.sch b/chips/omegaCounter/40nm/electric/purpleFive.delib/invK.sch
new file mode 100644 (file)
index 0000000..056297f
--- /dev/null
+++ b/chips/omegaCounter/40nm/electric/purpleFive.delib/invK.sch
@@ -0,0 +1,22 @@
+HpurpleFive|8.10k
+
+# External Libraries:
+
+LredFive|redFive
+
+# Cell invK;1{sch}
+CinvK;1{sch}||schematic|1021415734000|1159375623973||ATTR_Delay(D5G1;HNPX-14;Y-7.5;)I100|ATTR_LEKEEPER(D5G1;HNPTX-14;Y-11.5;)I1|ATTR_LEPARALLGRP(D5G1;HNPTX-14;Y-6.5;)I-1|ATTR_X(D5G1;HNOJPX-14;Y-5.5;)SLE.getdrive()|ATTR_drive0(D5G1;HNPTX-14;Y-9.5;)Sweak0|ATTR_drive1(D5G1;HNPTX-14;Y-10.5;)Sweak1|ATTR_su(D5G1;HNPTX-14;Y-8.5;)I-1|prototype_center()I[0,0]
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||-11|0||||
+NOff-Page|conn@1||8|0||||
+IredFive:invK;1{ic}|invK@0||0|0|||D0G4;|ATTR_Delay(D5G1;NOJPX2;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX1.5;Y2;)S@X|ATTR_drive0(OJP)S@drive0|ATTR_drive1(OJP)S@drive1
+IinvK;1{ic}|invK@1||18.5|12|||D0G4;|ATTR_Delay(D5G1;NPX2;Y-2;)I100|ATTR_LEKEEPER(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NOJPX1.5;Y2;)SLE.getdrive()|ATTR_drive0(P)Sweak0|ATTR_drive1(P)Sweak1|ATTR_su(P)I-1
+Ngeneric:Invisible-Pin|pin@0||24.5|-8.5|||||ART_message(D5G2;)S[X is drive strength,P and N drive strengths are equal]
+Ngeneric:Invisible-Pin|pin@1||-2|16|||||ART_message(D5G2;)S[P to N width ratio is 2 to 1]
+Ngeneric:Invisible-Pin|pin@2||-1|23.5|||||ART_message(D5G6;)S[invK]
+Ngeneric:Invisible-Pin|pin@3||-1|18|||||ART_message(D5G2;)S[LO threshold keeper inverter]
+Awire|net@0|||1800|conn@0|y|-9|0|invK@0|in|-2.5|0
+Awire|net@1|||0|conn@1|a|6|0|invK@0|out|2.5|0
+Ein||D5G2;|conn@0|a|I|ATTR_le(D5G1;NY-1.5;)I1
+Eout||D5G2;|conn@1|y|O|ATTR_le(D5G1;NY2;)I1
+X