migrate jelib->delib

[fleet.git] / chips / omegaCounter / 40nm / electric / purpleFive.delib / nand2Schmitt.sch

diff --git a/chips/omegaCounter/40nm/electric/purpleFive.delib/nand2Schmitt.sch b/chips/omegaCounter/40nm/electric/purpleFive.delib/nand2Schmitt.sch
new file mode 100644 (file)
index 0000000..b52aa49
--- /dev/null
+++ b/chips/omegaCounter/40nm/electric/purpleFive.delib/nand2Schmitt.sch
@@ -0,0 +1,82 @@
+HpurpleFive|8.10k
+
+# External Libraries:
+
+LredFive|redFive
+
+# Cell nand2Schmitt;1{sch}
+Cnand2Schmitt;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-27.5;Y-11.5;)I100|ATTR_LEGATE(D5G1;HNPX-16.5;Y-5;)I1|ATTR_M(D5G1;HNPX-27.5;Y-10.5;)I1|ATTR_S(D5G1;HNOJPX-27.5;Y-14.5;)SLE.getdrive()|ATTR_drive0(D5G1;HNPX-27.5;Y-12.5;)Sstrong0|ATTR_drive1(D5G1;HNPX-27.5;Y-13.5;)Sstrong1|ATTR_su(D5G1;HNPX-27.5;Y-9.5;)I-1|ATTR_verilog_template(D5G1;NTX6;Y-16;)Snand ($(drive0), $(drive1)) #($(Delay)) $(node_name) ($(out), $(ina), $(inb));|prototype_center()I[0,0]
+IredFive:NMOS;1{ic}|NMOS@0||-4|6|RRR||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1|ATTR_M(D5G1;NTY1;)I1
+IredFive:NMOS;1{ic}|NMOS@1||-9.5|0|RRR||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_X(D5G1.5;NPX3.5;Y0.5;)I1|ATTR_M(D5G1;NTY1;)I1
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||20|-2.5|||RR|
+NOff-Page|conn@1||20|11.5||||
+NOff-Page|conn@2||-23.5|9||||
+NOff-Page|conn@3||-23.5|3||||
+Inand2Schmitt;1{ic}|nand2Sch@0||29|22|||D0G4;|ATTR_Delay(D5G1;NPX2.5;Y-3;)I100|ATTR_LEGATE(D5G1;NPX-19.75;Y-15.5;)I1|ATTR_M(D5G1;NPX2.5;Y-2;)I1|ATTR_S(D5G1.5;NPX2;Y4;)I1|ATTR_drive0(D5G1;NPX2.5;Y-4;)Sstrong0|ATTR_drive1(D5G1;NPX2.5;Y-5;)Sstrong1|ATTR_su(D5G1;NPX-30.75;Y-20;)I-1
+Inms1;1{ic}|nms1@0||9.5|-6.5|YRR||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_LEGATE(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NPX3.5;Y0.5;)SLE.getdrive()|ATTR_su(P)I-1
+Inms1;1{ic}|nms1@1||0.5|-6.5|YRR||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_LEGATE(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NPX3.5;Y0.5;)SLE.getdrive()|ATTR_su(P)I-1
+Inms1;1{ic}|nms1@2||-11.5|-6.5|YRR||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_LEGATE(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NPX3.5;Y0.5;)SLE.getdrive()|ATTR_su(P)I-1
+NWire_Pin|pin@0||-7.5|6||||
+NWire_Pin|pin@1||-6|6||||
+NWire_Pin|pin@2||-7.5|6||||
+NWire_Pin|pin@3||-6|6||||
+Ngeneric:Invisible-Pin|pin@4||16.5|-8.5|||||ART_message(D6G2;)S[inC should be tied,to out externally]
+NWire_Pin|pin@5||14.5|-2.5||||
+NWire_Pin|pin@6||14.5|-6.5||||
+NWire_Pin|pin@7||14.5|1.5||||
+NWire_Pin|pin@8||-2|11.5||||
+NWire_Pin|pin@9||-14.5|3||||
+NWire_Pin|pin@10||-14.5|15.5||||
+NWire_Pin|pin@11||-4.5|-2.5||||
+NWire_Pin|pin@12||-4.5|-6.5||||
+NWire_Pin|pin@13||-11.5|-2.5||||
+NWire_Pin|pin@14||0.5|-2.5||||
+NWire_Pin|pin@15||5|-2.5||||
+NWire_Pin|pin@16||9.5|-2.5||||
+NWire_Pin|pin@17||5|1.5||||
+NWire_Pin|pin@18||5|-6.5||||
+Ngeneric:Invisible-Pin|pin@19||-1|30.5|||||ART_message(D5G6;)S[nand2Schmitt]
+Ngeneric:Invisible-Pin|pin@20||-1|25.5|||||ART_message(D5G2;)S[schmitt trigger with enable on pull-down (inb)]
+Ngeneric:Invisible-Pin|pin@21||-1|23|||||ART_message(D5G2;)S["hysteresis on ina, NOTE connect out to inC externally"]
+Ipms1;1{ic}|pms1@0||9.5|1.5|YRR||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_LEGATE(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NPX3;)SLE.getdrive()|ATTR_su(P)I-1
+Ipms1;1{ic}|pms1@1||0.5|1.5|YRR||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_LEGATE(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NPX3;)SLE.getdrive()|ATTR_su(P)I-1
+Ipms1;1{ic}|pms1@2||-2|15.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_LEGATE(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NPX3;)SLE.getdrive()|ATTR_su(P)I-1
+Awire|net@0|||900|pin@3||-6|6|pin@1||-6|6
+Awire|net@1|||0|pin@1||-6|6|pin@0||-7.5|6
+Awire|net@2|||2700|pin@0||-7.5|6|pin@2||-7.5|6
+Awire|net@3|||0|pin@3||-6|6|NMOS@0|s|-6|6
+Awire|net@4|||2700|NMOS@1|d|-7.5|0|pin@2||-7.5|6
+Awire|net@5|||1800|pin@8||-2|11.5|conn@1|a|18|11.5
+Awire|net@6|||1800|pin@5||14.5|-2.5|conn@0|y|18|-2.5
+Awire|net@7|||2700|pin@6||14.5|-6.5|pin@5||14.5|-2.5
+Awire|net@8|||2700|pin@5||14.5|-2.5|pin@7||14.5|1.5
+Awire|net@9|||1800|nms1@0|g|12.5|-6.5|pin@6||14.5|-6.5
+Awire|net@10|||0|pin@7||14.5|1.5|pms1@0|g|12.5|1.5
+Awire|net@11|||900|pin@8||-2|11.5|NMOS@0|d|-2|6
+Awire|net@12|||2700|pin@8||-2|11.5|pms1@2|d|-2|13.5
+Awire|net@13|||2700|pin@9||-14.5|3|pin@10||-14.5|15.5
+Awire|net@14|||1800|pin@9||-14.5|3|NMOS@1|g|-9.5|3
+Awire|net@15|||0|pin@9||-14.5|3|conn@3|y|-21.5|3
+Awire|net@16|||1800|pin@10||-14.5|15.5|pms1@2|g|-5|15.5
+Awire|net@17|||1800|conn@2|y|-21.5|9|NMOS@0|g|-4|9
+Awire|net@18|||900|pin@11||-4.5|-2.5|pin@12||-4.5|-6.5
+Awire|net@19|||1800|pin@13||-11.5|-2.5|pin@11||-4.5|-2.5
+Awire|net@20|||1800|pin@11||-4.5|-2.5|pin@14||0.5|-2.5
+Awire|net@21|||0|pin@12||-4.5|-6.5|nms1@2|g|-8.5|-6.5
+Awire|net@22|||2700|nms1@2|d|-11.5|-4.5|pin@13||-11.5|-2.5
+Awire|net@23|||900|NMOS@1|s|-11.5|0|pin@13||-11.5|-2.5
+Awire|net@24|||2700|nms1@1|d|0.5|-4.5|pin@14||0.5|-2.5
+Awire|net@25|||2700|pin@14||0.5|-2.5|pms1@1|d|0.5|-0.5
+Awire|net@26|||1800|pin@15||5|-2.5|pin@16||9.5|-2.5
+Awire|net@27|||900|pin@17||5|1.5|pin@15||5|-2.5
+Awire|net@28|||900|pin@15||5|-2.5|pin@18||5|-6.5
+Awire|net@29|||2700|nms1@0|d|9.5|-4.5|pin@16||9.5|-2.5
+Awire|net@30|||2700|pin@16||9.5|-2.5|pms1@0|d|9.5|-0.5
+Awire|net@31|||1800|pms1@1|g|3.5|1.5|pin@17||5|1.5
+Awire|net@32|||0|pin@18||5|-6.5|nms1@1|g|3.5|-6.5
+EinC||D5G2;|conn@0|y|I|ATTR_le(D5G1;NY-2;)F1.17
+Eina||D5G2;|conn@3|a|I|ATTR_le(D5G1;NY-1.5;)F1.33
+Einb||D5G2;|conn@2|a|I|ATTR_le(D5G1;NY1.5;)F0.67
+Eout||D5G2;|conn@1|y|O|ATTR_le(D5G1;NY2;)D1.33
+X