migrate jelib->delib

[fleet.git] / chips / omegaCounter / 40nm / electric / purpleFive.delib / nms3_sy3.sch

diff --git a/chips/omegaCounter/40nm/electric/purpleFive.delib/nms3_sy3.sch b/chips/omegaCounter/40nm/electric/purpleFive.delib/nms3_sy3.sch
new file mode 100644 (file)
index 0000000..cd9a227
--- /dev/null
+++ b/chips/omegaCounter/40nm/electric/purpleFive.delib/nms3_sy3.sch
@@ -0,0 +1,28 @@
+HpurpleFive|8.10k
+
+# External Libraries:
+
+LredFive|redFive
+
+# Cell nms3_sy3;1{sch}
+Cnms3_sy3;1{sch}||schematic|1021415734000|1159375578755||ATTR_Delay(D5G1;HNPX-20;Y-11.5;)I100|ATTR_LEGATE(D5G1;HNPTX-20;Y-14.5;)I1|ATTR_LEPARALLGRP(D5G1;HNPTX-20;Y-12.5;)I-1|ATTR_X(D5G1;HNOJPX-20;Y-10.5;)SLE.getdrive()|ATTR_su(D5G1;HNPTX-20;Y-13.5;)I-1|prototype_center()I[0,0]
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||14.5|0|||YRR|
+NOff-Page|conn@1||15|9||||
+NOff-Page|conn@2||-14.5|-4||||
+NOff-Page|conn@3||-14.5|4||||
+IredFive:nms3_sy3;1{ic}|nms3_sy3@0||-4|-4|||D0G4;|ATTR_Delay(D5G1;NOJPX-8.5;Y-1.5;)S@Delay|ATTR_X(D5G1.5;NOJPX-8.5;Y1;)S@X
+Inms3_sy3;1{ic}|nms3_sy3@1||32|11|||D0G4;|ATTR_Delay(D5G1;NPX3.25;Y-2;)I100|ATTR_LEGATE(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NOJPX-2;Y0.5;)SLE.getdrive()|ATTR_su(P)I-1
+NWire_Pin|pin@0||1|9||||
+Ngeneric:Invisible-Pin|pin@1||-2|21.5|||||ART_message(D5G6;)S[nms3_sy3]
+Ngeneric:Invisible-Pin|pin@2||-2|17|||||ART_message(D5G2;)S[semi-symmetric three N-type transistors to GND]
+Awire|net@0|||1800|conn@3|y|-12.5|4|nms3_sy3@0|g3|-7|4
+Awire|net@1|||1800|nms3_sy3@0|g2|7.5|0|conn@0|y|12.5|0
+Awire|net@2|||900|pin@0||1|9|nms3_sy3@0|d|1|7
+Awire|net@3|||1800|conn@2|y|-12.5|-4|nms3_sy3@0|g|-7|-4
+Awire|net@4|||1800|pin@0||1|9|conn@1|a|13|9
+Eina||D5G2;|conn@2|a|I|ATTR_le(D5G1;NX1.5;Y-2.5;)I1
+Einb||D5G2;|conn@0|a|I|ATTR_le(D5G1;NY-1.5;)I1
+Einc||D5G2;|conn@3|y|I|ATTR_le(D5G1;NY-2;)I1
+Eout||D5G2;|conn@1|y|O|ATTR_le(D5G1;NY2;)I1
+X