migrate jelib->delib

[fleet.git] / chips / omegaCounter / 40nm / electric / purpleFive.delib / nor2kresetV.ic

diff --git a/chips/omegaCounter/40nm/electric/purpleFive.delib/nor2kresetV.ic b/chips/omegaCounter/40nm/electric/purpleFive.delib/nor2kresetV.ic
new file mode 100644 (file)
index 0000000..4fcef45
--- /dev/null
+++ b/chips/omegaCounter/40nm/electric/purpleFive.delib/nor2kresetV.ic
@@ -0,0 +1,32 @@
+HpurpleFive|8.10k
+
+# Cell nor2kresetV;1{ic}
+Cnor2kresetV;1{ic}||artwork|1021415734000|1248841528989|E|ATTR_Delay(D5G1;HNPX2.5;Y-6.25;)I100|ATTR_LEGATE(D5G1;HNPX-18;Y-14.5;)I1|ATTR_LEPARALLGRP(D5G1;HPTX-1;Y-9.5;)I-1|ATTR_X(D5G1.5;HNOJPX2.25;Y2.25;)SLE.getdrive()|ATTR_drive0(D5G1;HPTX-7;Y-4;)Sstrong0|ATTR_drive1(D5G1;HPTX-7.25;Y-7.75;)Sstrong1|ATTR_su(D5G1;HPTX-3.25;Y-9.5;)I-1|prototype_center()I[6000,0]
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NThick-Circle|art@1||-3.75|-4.25|6|6|3200||ART_color()I78|ART_degrees()I800
+NThick-Circle|art@2||-1.5|-2.25|8|7|RRR||ART_color()I78|ART_degrees()F[0.0,1.0471976]
+NThick-Circle|art@3||-1.5|-6.25|8|7|YRRR||ART_color()I78|ART_degrees()F[0.0,1.0471976]
+NThick-Circle|art@4||2|-4.25|1|1|||ART_color()I78
+NOpened-Thicker-Polygon|art@5||0|-4.25|0.5|1|||ART_color()I78|trace()V[-0.25/0.5,-0.25/-0.5,-0.25/0,0.25/0.5,-0.25/0,0.25/-0.5]
+NPin|pin@0||0.5|-3.25|||R|
+NPin|pin@1||0.5|-1.75|1|1|R|
+Ngeneric:Invisible-Pin|pin@2||0.5|-1.75||||
+NPin|pin@3||-0.5|-6|1|1||
+NPin|pin@4||-1|-5.5|1|1||
+NPin|pin@5||-1|-3.25|1|1||
+NPin|pin@6||-2.5|-3.25||||
+Nschematic:Bus_Pin|pin@7||2.5|-4.25|-2|-2||
+Nschematic:Bus_Pin|pin@8||-2.5|-3.25|-2|-2||
+NPin|pin@9||-2.5|-5.25||||
+NPin|pin@10||-1|-5.25|1|1||
+Nschematic:Bus_Pin|pin@11||-2.5|-5.25|-2|-2||
+AThicker|net@0|||FS900|pin@1||0.5|-1.75|pin@0||0.5|-3.25|ART_color()I78
+AThicker|net@1|||FS2700|pin@4||-1|-5.5|pin@4||-1|-5.5|ART_color()I78
+AThicker|net@2|||FS3150|pin@3||-0.5|-6|pin@4||-1|-5.5|ART_color()I78
+AThicker|net@3|||FS0|pin@5||-1|-3.25|pin@6||-2.5|-3.25|ART_color()I78
+AThicker|net@4|||FS0|pin@10||-1|-5.25|pin@9||-2.5|-5.25|ART_color()I78
+Eina||D5G1;|pin@11||I
+Einb||D5G1;|pin@8||I
+Eout||D5G1;|pin@7||O
+EresetV||D5G2;|pin@2||I
+X