migrate jelib->delib
[fleet.git] / chips / omegaCounter / 40nm / electric / purpleFive.delib / pms1.sch
diff --git a/chips/omegaCounter/40nm/electric/purpleFive.delib/pms1.sch b/chips/omegaCounter/40nm/electric/purpleFive.delib/pms1.sch
new file mode 100644 (file)
index 0000000..181fa7e
--- /dev/null
@@ -0,0 +1,24 @@
+HpurpleFive|8.10k
+
+# External Libraries:
+
+LredFive|redFive
+
+# Cell pms1;2{sch}
+Cpms1;2{sch}||schematic|1021415734000|1248729055117||ATTR_Delay(D5G1;HNPX-8.5;Y2.5;)I100|ATTR_LEGATE(D5G1;HNPTX-8.5;Y1.5;)I1|ATTR_LEPARALLGRP(D5G1;HNPTX-8.5;Y0.5;)I-1|ATTR_X(D5G1;HNOJPX-8.5;Y3.5;)SLE.getdrive()|ATTR_su(D5G1;HNPTX-8.5;Y-0.5;)I-1|prototype_center()I[0,0]
+IredFive:PMOS;1{ic}|PMOS@1||0|7|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5G1.5;NOJPX3.5;Y0.5;)S@X
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||15.5|0||||
+NOff-Page|conn@1||-13.5|7||||
+Ngeneric:Invisible-Pin|pin@0||-1|18|||||ART_message(D5G2;)S[P-type transistor to VDD]
+Ngeneric:Invisible-Pin|pin@1||-1|23|||||ART_message(D5G6;)S[pms1]
+NWire_Pin|pin@2||0|0||||
+Ipms1;1{ic}|pms1@0||14|12.5|||D0G4;|ATTR_Delay(D5G1;NPX3.5;Y-2;)I100|ATTR_LEGATE(P)I1|ATTR_LEPARALLGRP(P)I-1|ATTR_X(D5G1.5;NOJPX3;)SLE.getdrive()|ATTR_su(P)S""
+NPower|pwr@0||0|14||||
+Awire|net@0|||900|pwr@0||0|14|PMOS@1|s|0|9
+Awire|net@1|||1800|conn@1|y|-11.5|7|PMOS@1|g|-3|7
+Awire|net@2|||2700|pin@2||0|0|PMOS@1|d|0|5
+Awire|net@3|||1800|pin@2||0|0|conn@0|a|13.5|0
+Ed||D5G2;|conn@0|y|O|ATTR_le(D5G1;NY2;)F0.67
+Eg||D5G2;|conn@1|a|I|ATTR_le(D5G1;NY2;)F0.67
+X