migrate jelib->delib

[fleet.git] / chips / omegaCounter / 40nm / electric / purpleFive.delib / pms2K.sch

diff --git a/chips/omegaCounter/40nm/electric/purpleFive.delib/pms2K.sch b/chips/omegaCounter/40nm/electric/purpleFive.delib/pms2K.sch
new file mode 100644 (file)
index 0000000..be5f608
--- /dev/null
+++ b/chips/omegaCounter/40nm/electric/purpleFive.delib/pms2K.sch
@@ -0,0 +1,40 @@
+HpurpleFive|8.10k
+
+# External Libraries:
+
+Lorange40nm|orange40nm
+
+# Cell pms2K;1{sch}
+Cpms2K;1{sch}||schematic|1021415734000|1248729478630||ATTR_Delay(D5G1;HNPX-9;Y1;)I100|ATTR_LEKEEPER(D5G1;HNPX-9;Y-1;)I1|ATTR_SP(D5G1;HNOJPX-9;Y2;)SLE.getdrive()|ATTR_su(D5G1;HNPX-9;)I-1|prototype_center()I[0,0]
+Iorange40nm:PMOS4f;1{ic}|PMOS4f@2||0|7|||D0G4;|ATTR_Delay(OJP)S@Delay|ATTR_L(D5G1;NPX3.5;)I2|ATTR_M1(D5G1;NOLPX4;Y-1;)S1|ATTR_NF(D5G1;NOLPX4;)S1|ATTR_W(D6G1;NPX2;Y1;)I3
+Iorange40nm:PMOS4f;1{ic}|PMOS4f@3||0|14|||D0G4;|ATTR_Delay(OJP)S@Delay|ATTR_L(D5G1;NOJPX3.5;)S@SP==0?0:@SP<0.25?(0.25*(2-0.4)/@SP + 0.4):2|ATTR_M1(D5G1;NOLPX4;Y-1;)S1|ATTR_NF(D5G1;NOLPX4;)S1|ATTR_W(D6G1;NOJPX2;Y1;)S@SP>1?3*@SP:3
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||-14.25|18.75||||
+NOff-Page|conn@1||-14|7||||
+NOff-Page|conn@2||8|0||||
+NGround|gnd@0||-6|10||||
+NWire_Pin|pin@0||2|7.5||||
+NWire_Pin|pin@1||2|14.5||||
+NWire_Pin|pin@2||0|18.75||||
+NWire_Pin|pin@3||-6|14||||
+Ngeneric:Invisible-Pin|pin@4||-1|31|||||ART_message(D5G6;)S[pms2K]
+Ngeneric:Invisible-Pin|pin@5||-1|26|||||ART_message(D5G2;)S[min P-type with resistor to pin]
+NWire_Pin|pin@6||0|0||||
+Ipms2K;1{ic}|pms2K@0||11|19|||D0G4;|ATTR_Delay(D5G1;NPX3.5;)I100|ATTR_LEKEEPER(D5G1;NPX3.5;Y-2;)I1|ATTR_SP(D5G1.5;NPX3.5;Y1;)I1|ATTR_su(D5G1;NPX3.5;Y-1;)I-1
+NPower|pwr@0||2|21||||
+Awire|net@0|||900|pin@1||2|14.5|pin@0||2|7.5
+Awire|net@1|||900|pin@2||0|18.75|PMOS4f@3|s|0|16
+Awire|net@2|||0|pin@1||2|14.5|PMOS4f@3|b|0|14.5
+Awire|net@3|||1800|pin@3||-6|14|PMOS4f@3|g|-3|14
+Awire|net@4|||900|PMOS4f@3|d|0|12|PMOS4f@2|s|0|9
+Awire|net@5|||0|pin@0||2|7.5|PMOS4f@2|b|0|7.5
+Awire|net@6|||1800|conn@1|y|-12|7|PMOS4f@2|g|-3|7
+Awire|net@7|||2700|pin@6||0|0|PMOS4f@2|d|0|5
+Awire|net@8|||900|pwr@0||2|21|pin@1||2|14.5
+Awire|net@9|||0|pin@2||0|18.75|conn@0|y|-12.25|18.75
+Awire|net@10|||900|pin@3||-6|14|gnd@0||-6|12
+Awire|net@11|||0|conn@2|a|6|0|pin@6||0|0
+Ein||D5G2;|conn@1|a|I|ATTR_le(D5G1;NY2;)I0
+Eout||D5G2;|conn@2|y|O|ATTR_le(D5G1;NY2;)F0.33
+Esrc||D5G2;|conn@0|a|I|ATTR_le(D5G1;NY-2;)I1
+X