migrate jelib->delib
[fleet.git] / chips / omegaCounter / 40nm / electric / redFive.delib / inv2iV.sch
diff --git a/chips/omegaCounter/40nm/electric/redFive.delib/inv2iV.sch b/chips/omegaCounter/40nm/electric/redFive.delib/inv2iV.sch
new file mode 100644 (file)
index 0000000..f39c1c8
--- /dev/null
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+HredFive|8.10k
+
+# Cell inv2iV;1{sch}
+Cinv2iV;1{sch}||schematic|1021415734000|1248729106644||ATTR_Delay(D5G1;HNPX-16;Y-12;)I100|ATTR_XN(D5FLeave alone;G1;HNOLPX-16;Y-10;)S1|ATTR_XP(D5FLeave alone;G1;HNOLPX-16;Y-11;)S1|ATTR_drive0(D5G1;HNPTX-16;Y-13;)Sstrong0|ATTR_drive1(D5G1;HNPTX-16;Y-14;)Sstrong1|prototype_center()I[0,0]
+INMOS;1{ic}|NMOS@1||0|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@XN
+IPMOS;1{ic}|PMOS@1||0|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S@Delay|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S@XP
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@0||-12|-6||||
+NOff-Page|conn@1||7|0||||
+NOff-Page|conn@2||-12|6||||
+NGround|gnd@0||0|-12||||
+Iinv2iV;1{ic}|inv2iV@0||18.5|9.5|||D0G4;|ATTR_Delay(D5G1;NPX1.5;Y-4;)I100|ATTR_XN(D5FLeave alone;G1.5;NOLPX1.5;Y-2.5;)S1|ATTR_XP(D5FLeave alone;G1.5;NOLPX1.5;Y2;)S1|ATTR_drive0(P)Sstrong0|ATTR_drive1(P)Sstrong1
+NWire_Pin|pin@0||0|0||||
+Ngeneric:Invisible-Pin|pin@1||-1.5|21|||||ART_message(D5G6;)S[inv2iV]
+Ngeneric:Invisible-Pin|pin@2||-0.5|16.5|||||ART_message(D5G2;)S[two-parameter two-input variable ratio inverter]
+Ngeneric:Invisible-Pin|pin@3||25|-12.5|||||ART_message(D5G2;)S[X is drive strength,"P and N drive strengths are XP, XN"]
+NPower|pwr@0||0|10.5||||
+Awire|net@0|||0|NMOS@1|g|-3|-6|conn@0|y|-10|-6
+Awire|net@1|||0|PMOS@1|g|-3|6|conn@2|y|-10|6
+Awire|net@2|||0|conn@1|a|5|0|pin@0||0|0
+Awire|net@3|||900|pin@0||0|0|NMOS@1|d|0|-4
+Awire|net@4|||2700|pin@0||0|0|PMOS@1|d|0|4
+Awire|net@5|||900|NMOS@1|s|0|-8|gnd@0||0|-10
+Awire|net@6|||2700|PMOS@1|s|0|8|pwr@0||0|10.5
+Ein[n]||D5G2;|conn@0|a|I
+Ein[p]||D5G2;|conn@2|a|I
+Eout||D5G2;|conn@1|y|O
+X