migrate jelib->delib

[fleet.git] / chips / omegaCounter / 40nm / electric / redFive.delib / nms3.ic

diff --git a/chips/omegaCounter/40nm/electric/redFive.delib/nms3.ic b/chips/omegaCounter/40nm/electric/redFive.delib/nms3.ic
new file mode 100644 (file)
index 0000000..b099551
--- /dev/null
+++ b/chips/omegaCounter/40nm/electric/redFive.delib/nms3.ic
@@ -0,0 +1,72 @@
+HredFive|8.10k
+
+# Cell nms3;1{ic}
+Cnms3;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX3;Y-2;)I100|ATTR_X(D5G1.5;HNOLPX-2;Y0.5;)S1|prototype_center()I[0,0]
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NPin|pin@0||1.5|4|1|1|Y|
+NPin|pin@1||3|4||||
+NPin|pin@2||0|2|1|1|YRR|
+NPin|pin@3||1.5|5|1|1|YRR|
+NPin|pin@4||1.5|3|1|1|YRR|
+NPin|pin@5||0|3|1|1|YRR|
+NPin|pin@6||0.75|3|1|1|YRR|
+NPin|pin@7||0.75|5|1|1|YRR|
+NPin|pin@8||0|5|1|1|YRR|
+NPin|pin@9||0|6|||RR|
+NPin|pin@10||0|2|1|1||
+NPin|pin@11||0|1|1|1||
+NPin|pin@12||-0.75|1|1|1||
+NPin|pin@13||-0.75|-1|1|1||
+NPin|pin@14||0|-1|1|1||
+NPin|pin@15||-1.5|-1|1|1||
+NPin|pin@16||-1.5|1|1|1||
+NPin|pin@17||-1|-2|1|1||
+NPin|pin@18||0|-3||||
+NPin|pin@19||1|-2|1|1||
+NPin|pin@20||0|-2|1|1||
+NPin|pin@21||-3|0|||RR|
+NPin|pin@22||-1.5|0|1|1|RR|
+Nschematic:Bus_Pin|pin@23||3|4|-2|-2||
+Nschematic:Bus_Pin|pin@24||-3|0|-2|-2||
+Nschematic:Bus_Pin|pin@25||0|10|-2|-2||
+Ngeneric:Invisible-Pin|pin@26||-3|8||||
+NPin|pin@27||-1.5|8|1|1|RR|
+NPin|pin@28||-3|8|||RR|
+NPin|pin@29||0|6|1|1||
+NPin|pin@30||-1.5|9|1|1||
+NPin|pin@31||-1.5|7|1|1||
+NPin|pin@32||0|7|1|1||
+NPin|pin@33||-0.75|7|1|1||
+NPin|pin@34||-0.75|9|1|1||
+NPin|pin@35||0|9|1|1||
+NPin|pin@36||0|10||||
+AThicker|net@0|||FS0|pin@1||3|4|pin@0||1.5|4|ART_color()I10
+AThicker|net@1|||FS900|pin@7||0.75|5|pin@6||0.75|3|ART_color()I10
+AThicker|net@2|||FS900|pin@3||1.5|5|pin@4||1.5|3|ART_color()I10
+AThicker|net@3|||FS1800|pin@8||0|5|pin@7||0.75|5|ART_color()I10
+AThicker|net@4|||FS900|pin@9||0|6|pin@8||0|5|ART_color()I10
+AThicker|net@5|||FS0|pin@6||0.75|3|pin@5||0|3|ART_color()I10
+AThicker|net@6|||FS900|pin@5||0|3|pin@2||0|2|ART_color()I10
+AThicker|net@7|||FS1800|pin@21||-3|0|pin@22||-1.5|0|ART_color()I10
+AThicker|net@8|||FS2250|pin@18||0|-3|pin@19||1|-2|ART_color()I10
+AThicker|net@9|||FS0|pin@20||0|-2|pin@17||-1|-2|ART_color()I10
+AThicker|net@10|||FS1350|pin@17||-1|-2|pin@18||0|-3|ART_color()I10
+AThicker|net@11|||FS0|pin@19||1|-2|pin@20||0|-2|ART_color()I10
+AThicker|net@12|||FS0|pin@11||0|1|pin@12||-0.75|1|ART_color()I10
+AThicker|net@13|||FS900|pin@12||-0.75|1|pin@13||-0.75|-1|ART_color()I10
+AThicker|net@14|||FS900|pin@10||0|2|pin@11||0|1|ART_color()I10
+AThicker|net@15|||FS900|pin@14||0|-1|pin@20||0|-2|ART_color()I10
+AThicker|net@16|||FS1800|pin@13||-0.75|-1|pin@14||0|-1|ART_color()I10
+AThicker|net@17|||FS900|pin@16||-1.5|1|pin@15||-1.5|-1|ART_color()I10
+AThicker|net@18|||FS900|pin@34||-0.75|9|pin@33||-0.75|7|ART_color()I10
+AThicker|net@19|||FS1800|pin@28||-3|8|pin@27||-1.5|8|ART_color()I10
+AThicker|net@20|||FS900|pin@32||0|7|pin@29||0|6|ART_color()I10
+AThicker|net@21|||FS1800|pin@33||-0.75|7|pin@32||0|7|ART_color()I10
+AThicker|net@22|||FS0|pin@35||0|9|pin@34||-0.75|9|ART_color()I10
+AThicker|net@23|||FS900|pin@36||0|10|pin@35||0|9|ART_color()I10
+AThicker|net@24|||FS900|pin@30||-1.5|9|pin@31||-1.5|7|ART_color()I10
+Ed||D5G1;|pin@25||O
+Eg||D5G1;|pin@24||I
+Eg2||D5G1;|pin@23||I
+Eg3||D5G1;|pin@26||I
+X