migrate jelib->delib

[fleet.git] / chips / omegaCounter / 40nm / electric / redFive.delib / nms3_2sy.ic

diff --git a/chips/omegaCounter/40nm/electric/redFive.delib/nms3_2sy.ic b/chips/omegaCounter/40nm/electric/redFive.delib/nms3_2sy.ic
new file mode 100644 (file)
index 0000000..ee7c320
--- /dev/null
+++ b/chips/omegaCounter/40nm/electric/redFive.delib/nms3_2sy.ic
@@ -0,0 +1,104 @@
+HredFive|8.10k
+
+# Cell nms3_2sy;1{ic}
+Cnms3_2sy;1{ic}||artwork|1021415734000|1204140525662|E|ATTR_Delay(D5G1;HNPX5;Y-1.5;)I100|ATTR_X(D5FLeave alone;G1.5;HNOLPX-3.75;Y2.5;)S1|prototype_center()I[26000,-36000]
+Ngeneric:Facet-Center|art@0||0|0||||AV
+Nschematic:Bus_Pin|pin@0||-3|8||||
+NPin|pin@2||-3|8|||RR|
+NPin|pin@3||2.25|4|1|1|Y|
+NPin|pin@4||3|4|1|1|Y|
+NPin|pin@5||-1.5|0|1|1|RR|
+NPin|pin@6||-2.25|0|1|1|RR|
+NPin|pin@7||0|-2|1|1||
+NPin|pin@8||-0.75|-1|1|1||
+NPin|pin@9||0|-1|1|1|YRR|
+NPin|pin@10||0|1|1|1|YRR|
+NPin|pin@11||-0.75|1|1|1||
+NPin|pin@12||-0.75|-1|1|1||
+NPin|pin@13||-1.5|1|1|1||
+NPin|pin@14||-1.5|-1|1|1||
+NPin|pin@15||-2.25|4|1|1||
+NPin|pin@16||2.25|8|1|1||
+NPin|pin@17||0.25|5|1|1||
+NPin|pin@18||-0.25|7|1|1||
+NPin|pin@19||0.25|7|1|1||
+NPin|pin@20||0.75|5|1|1|YRR|
+NPin|pin@21||0.75|3|1|1|YRR|
+NPin|pin@22||0|3|1|1|YRR|
+NPin|pin@23||1.5|3|1|1|YRR|
+NPin|pin@24||1.5|5|1|1|YRR|
+NPin|pin@25||2.25|4|1|1|Y|
+NPin|pin@26||1.5|4|1|1|Y|
+NPin|pin@27||-1.5|7|1|1||
+NPin|pin@28||-1.5|9|1|1||
+NPin|pin@29||-2.25|8|1|1|RR|
+NPin|pin@30||-1.5|8|1|1|RR|
+NPin|pin@31||-0.75|7|1|1||
+NPin|pin@32||-0.75|9|1|1||
+NPin|pin@33||1.5|8|1|1|Y|
+NPin|pin@34||2.25|8||||
+NPin|pin@35||1.5|9|1|1|YRR|
+NPin|pin@36||1.5|7|1|1|YRR|
+NPin|pin@37||0.75|7|1|1|YRR|
+NPin|pin@38||0.75|9|1|1|YRR|
+NPin|pin@39||0|9|1|1|YRR|
+NPin|pin@40||0|10|||RR|
+NPin|pin@41||-0.25|5|1|1||
+NPin|pin@42||-0.75|5|1|1||
+NPin|pin@43||-0.75|3|1|1||
+NPin|pin@44||0|3|1|1||
+NPin|pin@45||-1.5|3|1|1||
+NPin|pin@46||-1.5|5|1|1||
+NPin|pin@47||-1|-2|1|1||
+NPin|pin@48||0|-3||||
+NPin|pin@49||1|-2|1|1||
+NPin|pin@50||-2.25|4|||RR|
+NPin|pin@51||-1.5|4|1|1|RR|
+Nschematic:Bus_Pin|pin@52||3|4|-2|-2||
+Nschematic:Bus_Pin|pin@53||-2.25|0|-2|-2||
+Nschematic:Bus_Pin|pin@54||0|10|-2|-2||
+NPin|pin@55||-3|8|1|1|RR|
+NPin|pin@56||-2.25|8|1|1|RR|
+AThicker|net@1|||FS0|pin@4||3|4|pin@3||2.25|4|ART_color()I10
+AThicker|net@2|||FS1800|pin@6||-2.25|0|pin@5||-1.5|0|ART_color()I10
+AThicker|net@3|||FS2700|pin@7||0|-2|pin@9||0|-1|ART_color()I10
+AThicker|net@4|||FS1800|pin@47||-1|-2|pin@7||0|-2|ART_color()I10
+AThicker|net@5|||FS1800|pin@7||0|-2|pin@49||1|-2|ART_color()I10
+AThicker|net@6|||FS1800|pin@8||-0.75|-1|pin@9||0|-1|ART_color()I10
+AThicker|net@7|||FS2700|pin@10||0|1|pin@44||0|3|ART_color()I10
+AThicker|net@8|||FS900|pin@13||-1.5|1|pin@14||-1.5|-1|ART_color()I10
+AThicker|net@9|||FS2700|pin@12||-0.75|-1|pin@11||-0.75|1|ART_color()I10
+AThicker|net@10|||FS1800|pin@11||-0.75|1|pin@10||0|1|ART_color()I10
+AThicker|net@11|||FS2700|pin@15||-2.25|4|pin@29||-2.25|8|ART_color()I10
+AThicker|net@12|||FS900|pin@16||2.25|8|pin@25||2.25|4|ART_color()I10
+AThicker|net@13|||FS0|pin@34||2.25|8|pin@33||1.5|8|ART_color()I10
+AThicker|net@14|||FS0|pin@20||0.75|5|pin@17||0.25|5|ART_color()I10
+AThicker|net@15|||FS2840|pin@17||0.25|5|pin@18||-0.25|7|ART_color()I10
+AThicker|net@16|||FS0|pin@18||-0.25|7|pin@31||-0.75|7|ART_color()I10
+AThicker|net@17|||FS0|pin@37||0.75|7|pin@19||0.25|7|ART_color()I10
+AThicker|net@18|||FS760|pin@19||0.25|7|pin@41||-0.25|5|ART_color()I10
+AThicker|net@19|||FS900|pin@24||1.5|5|pin@23||1.5|3|ART_color()I10
+AThicker|net@20|||FS0|pin@21||0.75|3|pin@22||0|3|ART_color()I10
+AThicker|net@21|||FS900|pin@20||0.75|5|pin@21||0.75|3|ART_color()I10
+AThicker|net@22|||FS0|pin@25||2.25|4|pin@26||1.5|4|ART_color()I10
+AThicker|net@23|||FS900|pin@28||-1.5|9|pin@27||-1.5|7|ART_color()I10
+AThicker|net@24|||FS1800|pin@29||-2.25|8|pin@30||-1.5|8|ART_color()I10
+AThicker|net@25|||FS2700|pin@31||-0.75|7|pin@32||-0.75|9|ART_color()I10
+AThicker|net@26|||FS1800|pin@32||-0.75|9|pin@39||0|9|ART_color()I10
+AThicker|net@27|||FS900|pin@38||0.75|9|pin@37||0.75|7|ART_color()I10
+AThicker|net@28|||FS1800|pin@39||0|9|pin@38||0.75|9|ART_color()I10
+AThicker|net@29|||FS900|pin@35||1.5|9|pin@36||1.5|7|ART_color()I10
+AThicker|net@30|||FS900|pin@40||0|10|pin@39||0|9|ART_color()I10
+AThicker|net@31|||FS2250|pin@48||0|-3|pin@49||1|-2|ART_color()I10
+AThicker|net@32|||FS1800|pin@43||-0.75|3|pin@44||0|3|ART_color()I10
+AThicker|net@33|||FS1800|pin@50||-2.25|4|pin@51||-1.5|4|ART_color()I10
+AThicker|net@34|||FS900|pin@46||-1.5|5|pin@45||-1.5|3|ART_color()I10
+AThicker|net@35|||FS1350|pin@47||-1|-2|pin@48||0|-3|ART_color()I10
+AThicker|net@36|||FS0|pin@41||-0.25|5|pin@42||-0.75|5|ART_color()I10
+AThicker|net@37|||FS900|pin@42||-0.75|5|pin@43||-0.75|3|ART_color()I10
+AThicker|net@38|||FS1800|pin@55||-3|8|pin@56||-2.25|8|ART_color()I10
+Ed||D5G1;|pin@54||O
+Eg||D5G1;|pin@53||I
+Eg2||D5G1;|pin@52||I
+Eg3||D5G1;|pin@0||I
+X