merge omegaCounter 40nm/90nm branches into chips/omegaCounter/

[fleet.git] / chips / omegaCounter / 40nm / header.hsp

diff --git a/chips/omegaCounter/40nm/header.hsp b/chips/omegaCounter/40nm/header.hsp
new file mode 100644 (file)
index 0000000..15d02b0
--- /dev/null
+++ b/chips/omegaCounter/40nm/header.hsp
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+********************** TSMC 90nm Header **************************
+
+******************************************************************
+* Set Process, Voltage and Temperature corner
+******************************************************************
+
+.protect
+
+* 90nm
+*.lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT
+*.lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_RES
+*.lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_18
+*.lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_na18
+*.lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_DIO_esd
+*.lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_DIO_18
+
+* 40nm
+.lib '/import/async/cad/process/tsmcsun045/sun_spice_models/1.01/models/toplevel_cln40gp.l' TOP_TT
+
+.unprotect
+
+
+.param sup=0.9    * Supply voltage
+.temp 80          * Temperature
+
+******************************************************************
+* Standard Parameters and Options
+******************************************************************
+
+.param vsupply=sup
+.param vhi=sup
+.param vlo=0
+.param strong0=0 * Used in verilog, just needs to be defined to run hspice
+.param strong1=1 * Used in verilog, just needs to be defined to run hspice
+vvdd vdd gnd 'sup'
+.options ACCT OPTS post
+*.option post probe
+* .opt scale=0.05u
+.op
+
+.param AVT0N = AGAUSS(0.0,  '0.01 / 0.1' , 1)
+.param AVT0P = AGAUSS(0.0,  '0.01 / 0.1' , 1)
+.param ABN = AGAUSS(0.0,  '0.02 / 0.1' , 1)
+.param ABP = AGAUSS(0.0,  '0.02 / 0.1' , 1)
+
+******************************************************************
+* hsim gunk
+******************************************************************
+.hsimparam HSIMDCINIT=0
+.hsimparam HSIMVDD=0.9
+.param HSIMSTOPAT=0
+
+* .param HSIMOUTPUT=fsdb
+* .param HSIMOUTPUTTBL=rawfile
+
+.param HSIMOUTPUT=out
+
+* .param HSIMPRINTSIMSTATUS=1
+* .param HSIMOUTPUTFLUSH=1n
+
+* .param HSIMSPEED=8
+
+* for extracted-layout simulation
+.param HSIMPOSTL=3
+
+* I used to use HSIMSPEED=5, but the omega counter has simulation artifacts at that level
+.param HSIMSPEED=4
+
+* defaults -- play with these?
+* .param HSIMSPEED=3
+* .param HSIMPORTV=0.001
+* .param HSIMPORTCR=0.01
+
+.ic v(mc)=0.9
+.nodeset v(mc)=0.9
+.force mc 0.9 time=0u
+
+Rgndtovss gnd vss 0
+
+*
+* these are here to keep hsim from "optimizing away" the signals we care about
+*
+.ic v(tms)=0.0
+.ic v(tck)=0.0
+.ic v(mc)=0.0
+.ic v(tdi)=0.0
+.ic v(tdo)=0.0
+.ic v(trstb)=0.0
+
+.nodeset v(tms)=0.0
+.nodeset v(tck)=0.0
+.nodeset v(mc)=0.0
+.nodeset v(tdi)=0.0
+.nodeset v(tdo)=0.0
+.nodeset v(trstb)=0.0
+
+* .print v(xmarinagu@0.xoutdockw@3.xmarinaou@1.xoutputDo@0.xoutM1Pre@0.xoutDockP@0.xoutDockC@0.*)
+* .print v(marinagu@0/jtagcent@0/*)
+
+.print v(*)
+
+
+