removed another unnecessary delay on driver input

[fleet.git] / electric / latchPartsK.jelib

diff --git a/electric/latchPartsK.jelib b/electric/latchPartsK.jelib
index 22b890c..b9b26e0 100755 (executable)
--- a/electric/latchPartsK.jelib
+++ b/electric/latchPartsK.jelib
@@ -379,7 +379,7 @@ Eout[2]||D6G2;|conn@3|y|O
 X
 
 # Cell latchAmp09.6B;1{lay}
-ClatchAmp09.6B;1{lay}||cmos90|1194186146497|1239549868233||ATTR_NCC(D5G3;NTY70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+ClatchAmp09.6B;1{lay}||cmos90|1194186146497|1241981698008||ATTR_NCC(D5G3;NTY70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241982205540
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NMetal-1-P-Active-Con|contact@1||0|-37.5||5.2|X|
 NMetal-1-Polysilicon-Con|contact@2||-5.5|-24||5.2|X|
@@ -513,7 +513,7 @@ Eout[1]||D6G2;|conn@1|y|O
 X
 
 # Cell latchAmp10;1{lay}
-ClatchAmp10;1{lay}||cmos90|1194186146497|1239549868233||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+ClatchAmp10;1{lay}||cmos90|1194186146497|1241981698008||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241981714344
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NMetal-1-N-Active-Con|contact@0||0|0||20.8|X|
 NMetal-1-P-Active-Con|contact@1||0|-48||20.8|X|
@@ -580,7 +580,7 @@ Evdd_1||D5G2;|pin@11||P
 X
 
 # Cell latchAmp10A;1{lay}
-ClatchAmp10A;1{lay}||cmos90|1194186146497|1239549868233||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+ClatchAmp10A;1{lay}||cmos90|1194186146497|1241212843263||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241982414663
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NMetal-1-N-Active-Con|contact@0||0|0||20.8|X|
 NMetal-1-P-Active-Con|contact@1||0|-48||20.8|X|
@@ -760,7 +760,7 @@ Evdd_3||D5G2;|pin@13||P
 X
 
 # Cell latchAmp20;1{lay}
-ClatchAmp20;1{lay}||cmos90|1194186146497|1239549868233||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+ClatchAmp20;1{lay}||cmos90|1194186146497|1241981698008||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241982287554
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NMetal-1-N-Active-Con|contact@0||0|0||20.8|X|
 NMetal-1-P-Active-Con|contact@1||0|-48||20.8|X|
@@ -870,7 +870,7 @@ Evdd_3||D5G2;|pin@13||O
 X
 
 # Cell latchAmp20B;1{lay}
-ClatchAmp20B;1{lay}||cmos90|1194186146497|1239549868233||ATTR_NCC(D5G3;NTY70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+ClatchAmp20B;1{lay}||cmos90|1194186146497|1241981698008||ATTR_NCC(D5G3;NTY70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241981826991
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NMetal-1-N-Active-Con|contact@0||-3.5|0||20.8|X|
 NMetal-1-P-Active-Con|contact@1||-4.4|-48||20.8|X|
@@ -1856,7 +1856,7 @@ Eout[1]||D6G2;|conn@1|y|O
 X
 
 # Cell latchAmp60Cm1;1{lay}
-ClatchAmp60Cm1;1{lay}|latchAmp60C|cmos90|1188660928601|1239549868233||ATTR_NCC(D5G3;NTX-1.5;Y70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+ClatchAmp60Cm1;1{lay}|latchAmp60C|cmos90|1188660928601|1241981698008||ATTR_NCC(D5G3;NTX-1.5;Y70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241982205540
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NMetal-1-P-Active-Con|contact@2||-16|-48||20.8||
 NMetal-1-N-Active-Con|contact@3||-16|0||20.8||
@@ -2504,7 +2504,7 @@ Eout[s]||D5G2;|pin@2||O
 X
 
 # Cell latchKeep;1{lay}
-ClatchKeep;1{lay}||cmos90|1188657354781|1239549868233||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+ClatchKeep;1{lay}||cmos90|1188657354781|1241981698008||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241981714344
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NMetal-1-Polysilicon-Con|contact@101||-2.5|-13||5.2||
 NMetal-1-Polysilicon-Con|contact@102||2.5|-27||5.2||
@@ -2577,7 +2577,82 @@ Evdd||D5G2;|pin@256||P
 X
 
 # Cell latchKeep;1{sch}
-ClatchKeep;1{sch}||schematic|1191787271697|1219795341159|
+ClatchKeep;1{sch}||schematic|1191787271697|1239816326035|
+IorangeTSMC090nm:NMOSxwk;1{ic}|NMOSxwk@0||-9|-6|X||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1.733
+IorangeTSMC090nm:NMOSxwk;1{ic}|NMOSxwk@1||8|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1.733
+IorangeTSMC090nm:PMOSxwk;1{ic}|PMOSxwk@0||-9|6|X||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S100|ATTR_X(D5FLeave alone;G1.5;NOLPX5;Y0.5;)S1
+IorangeTSMC090nm:PMOSxwk;1{ic}|PMOSxwk@1||8|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S4
+Ngeneric:Facet-Center|art@0||0|0||||AV
+NOff-Page|conn@2||-16|0|||RR|
+NOff-Page|conn@3||16|0||||
+NGround|gnd@0||8|-12.5||||
+NGround|gnd@1||-9|-12.5|||X|
+IlatchKeep;1{ic}|latchFlo@0||18|11|||D5G4;
+Ngeneric:Invisible-Pin|pin@0||0.5|31.5|||||ART_message(D5G6;)SlatchKeep
+Ngeneric:Invisible-Pin|pin@1||-0.5|22.5|||||ART_message(D5G3;)Sies 19 November 2007
+Ngeneric:Invisible-Pin|pin@2||-1.5|26.5|||||ART_message(D5G4;)Sthis is the latch keeper
+NWire_Pin|pin@5||-3|6||||
+NWire_Pin|pin@6||-3|-6||||
+NWire_Pin|pin@7||3|-6||||
+NWire_Pin|pin@8||3|6||||
+NWire_Pin|pin@9||-9|2||||
+NWire_Pin|pin@12||8|-2||||
+NWire_Pin|pin@15||3|2||||
+NWire_Pin|pin@16||-3|-2||||
+NWire_Pin|pin@21||-9|0||||
+NWire_Pin|pin@22||8|0||||
+Ngeneric:Invisible-Pin|pin@23||-0.5|18.5|||||ART_message(D5G2;)Stransistors made weak, ies 15 April 2009
+NPower|pwr@0||8|12.5||||
+NPower|pwr@1||-9|12.5|||X|
+Awire|net@0|||900|pwr@0||8|12.5|PMOSxwk@1|s|8|8
+Awire|net@2|||2700|gnd@0||8|-10.5|NMOSxwk@1|s|8|-8
+Awire|net@4|||900|pwr@1||-9|12.5|PMOSxwk@0|s|-9|8
+Awire|net@6|||2700|gnd@1||-9|-10.5|NMOSxwk@0|s|-9|-8
+Awire|net@8|||1800|PMOSxwk@0|g|-6|6|pin@5||-3|6
+Awire|net@9|||900|pin@5||-3|6|pin@16||-3|-2
+Awire|net@10|||0|pin@6||-3|-6|NMOSxwk@0|g|-6|-6
+Awire|net@11|||0|NMOSxwk@1|g|5|-6|pin@7||3|-6
+Awire|net@12|||2700|pin@7||3|-6|pin@15||3|2
+Awire|net@13|||1800|pin@8||3|6|PMOSxwk@1|g|5|6
+Awire|net@16|||900|PMOSxwk@0|d|-9|4|pin@9||-9|2
+Awire|net@20|||900|pin@12||8|-2|NMOSxwk@1|d|8|-4
+Awire|net@21|||0|pin@12||8|-2|pin@16||-3|-2
+Awire|net@25|||2700|pin@15||3|2|pin@8||3|6
+Awire|net@27|||900|pin@16||-3|-2|pin@6||-3|-6
+Awire|net@34|||1800|pin@9||-9|2|pin@15||3|2
+Awire|net@41|||2700|NMOSxwk@0|d|-9|-4|pin@21||-9|0
+Awire|net@42|||2700|pin@21||-9|0|pin@9||-9|2
+Awire|net@43|||1800|conn@2|a|-14|0|pin@21||-9|0
+Awire|net@44|||900|PMOSxwk@1|d|8|4|pin@22||8|0
+Awire|net@45|||900|pin@22||8|0|pin@12||8|-2
+Awire|net@46|||0|conn@3|a|14|0|pin@22||8|0
+Eout[B]||D6G2;|conn@3|y|O
+Eout[s]||D6G2;|conn@2|y|O
+X
+
+# Cell latchKeepOld;1{ic}
+ClatchKeepOld;1{ic}||artwork|1191787734782|1219795381160|E
+Ngeneric:Facet-Center|art@0||0|0||||AV
+Nschematic:Bus_Pin|pin@0||2|0|-1|-1|X|
+Nschematic:Bus_Pin|pin@2||-2|0|-1|-1|X|
+NPin|pin@5||2|2.5|1|1|X|
+NPin|pin@6||-0.5|0.5|1|1|X|
+NPin|pin@7||-2|1.5|1|1|X|
+NPin|pin@8||-2|-1.5|1|1|X|
+NPin|pin@9||-0.5|-0.5|1|1|X|
+NPin|pin@10||2|-2.5|1|1|X|
+AThicker|net@3|||FS387|pin@5||2|2.5|pin@6||-0.5|0.5
+AThicker|net@4|||FS3263|pin@6||-0.5|0.5|pin@7||-2|1.5
+AThicker|net@5|||FS900|pin@7||-2|1.5|pin@8||-2|-1.5
+AThicker|net@6|||FS2137|pin@8||-2|-1.5|pin@9||-0.5|-0.5
+AThicker|net@7|||FS1413|pin@9||-0.5|-0.5|pin@10||2|-2.5
+AThicker|net@8|||FS900|pin@5||2|2.5|pin@10||2|-2.5
+Eout[B]||D5G2;|pin@0||O
+Eout[s]||D5G2;|pin@2||O
+X
+
+# Cell latchKeepOld;1{sch}
+ClatchKeepOld;1{sch}||schematic|1191787271697|1239816052534|
 IorangeTSMC090nm:NMOSx;1{ic}|NMOSx@0||8|-6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1.733
 IorangeTSMC090nm:NMOSx;1{ic}|NMOSx@1||-9|-6|X||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S1.733
 IorangeTSMC090nm:PMOSx;1{ic}|PMOSx@0||8|6|||D0G4;|ATTR_Delay(D5G1;NOJPX3.5;Y-2;)S100|ATTR_X(D5FLeave alone;G1.5;NOLPX3.5;Y0.5;)S4
@@ -2587,7 +2662,7 @@ NOff-Page|conn@2||-16|0|||RR|
 NOff-Page|conn@3||16|0||||
 NGround|gnd@0||8|-12.5||||
 NGround|gnd@1||-9|-12.5|||X|
-IlatchKeep;1{ic}|latchFlo@0||18|11|||D5G4;
+IlatchKeepOld;1{ic}|latchKee@0||18|11|||D5G4;
 Ngeneric:Invisible-Pin|pin@0||0.5|27.5|||||ART_message(D5G6;)SlatchKeep
 Ngeneric:Invisible-Pin|pin@1||-0.5|18.5|||||ART_message(D5G3;)Sies 19 November 2007
 Ngeneric:Invisible-Pin|pin@2||-1.5|22.5|||||ART_message(D5G4;)Sthis is the latch keeper
@@ -2665,7 +2740,7 @@ Ex[T]||D5G2;|pin@5||O
 X
 
 # Cell latchPointF;1{lay}
-ClatchPointF;1{lay}||cmos90|1188657354781|1239549868233||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+ClatchPointF;1{lay}||cmos90|1188657354781|1241981698008||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241981714344
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NMetal-1-N-Active-Con|contact@116||0|0||20.8|X|
 NMetal-1-P-Active-Con|contact@117||0|-48||20.8|X|
@@ -2810,7 +2885,7 @@ Ex[T]||D5G2;|pin@5||O
 X
 
 # Cell latchPointFmcHI;1{lay}
-ClatchPointFmcHI;1{lay}||cmos90|1188657354781|1239549868233||ATTR_NCC(D5G3;NTY70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+ClatchPointFmcHI;1{lay}||cmos90|1188657354781|1241212843263||ATTR_NCC(D5G3;NTY70;)S["exportsConnectedByParent vdd /vdd_[0-9]+/"]|DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241982414663
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NMetal-1-N-Active-Con|contact@121||6|27|||Y|
 NMetal-1-N-Active-Con|contact@122||14|27|||Y|
@@ -2895,7 +2970,7 @@ Ex[T]||D6G2;|conn@1|y|O
 X
 
 # Cell latchPointFw;1{lay}
-ClatchPointFw;1{lay}|latchPointF|cmos90|1188657354781|1239549868233||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+ClatchPointFw;1{lay}|latchPointF|cmos90|1188657354781|1241981698008||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241981714344
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NMetal-1-N-Active-Con|contact@116||0|0||20.8|X|
 NMetal-1-P-Active-Con|contact@117||0|-48||20.8|X|
@@ -3000,7 +3075,7 @@ Ex[T]||D5G2;|pin@5||O
 X
 
 # Cell latchPointT;1{lay}
-ClatchPointT;1{lay}||cmos90|1188657354781|1239549868233||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+ClatchPointT;1{lay}||cmos90|1188657354781|1241981698008||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241981826991
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NMetal-1-N-Active-Con|contact@116||0|0||20.8|X|
 NMetal-1-P-Active-Con|contact@117||0|-48||20.8|X|
@@ -3433,21 +3508,21 @@ Ex[T]||D5G2;|pin@260||O
 X
 
 # Cell shoulderFill;1{lay}
-CshoulderFill;1{lay}||cmos90|1194182893373|1239549868233||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+CshoulderFill;1{lay}||cmos90|1194182893373|1241981698008||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241981714344
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NN-Well-Node|plnode@0||0|0|14|52||A
 NP-Select-Node|plnode@1||0.75|0|12.5|52||A
 X
 
 # Cell shoulderFillNarrow;1{lay}
-CshoulderFillNarrow;1{lay}||cmos90|1194182893373|1239549868233||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+CshoulderFillNarrow;1{lay}||cmos90|1194182893373|1241981698008||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241981714344
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NN-Well-Node|plnode@0||0|0|13|52||A
 NP-Select-Node|plnode@1||0.75|0|11.5|52||A
 X
 
 # Cell shoulderFillWide;1{lay}
-CshoulderFillWide;1{lay}||cmos90|1194182893373|1239549868233||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1239553775974
+CshoulderFillWide;1{lay}||cmos90|1194182893373|1241981698008||DRC_last_good_drc_bit()I10|DRC_last_good_drc_date()G1241981714344
 Ngeneric:Facet-Center|art@0||0|0||||AV
 NN-Well-Node|plnode@0||0|0|28|52||A
 NP-Select-Node|plnode@1||0.75|0|26.5|52||A