move marina directory into a subdirectory of chips

[fleet.git] / marina / electric / marina_padframe.delib / PRS0816CDG_18.sch

diff --git a/marina/electric/marina_padframe.delib/PRS0816CDG_18.sch b/marina/electric/marina_padframe.delib/PRS0816CDG_18.sch
deleted file mode 100755 (executable)
index 37db3c0..0000000
--- a/marina/electric/marina_padframe.delib/PRS0816CDG_18.sch
+++ /dev/null
@@ -1,66 +0,0 @@
-Hmarina_padframe|8.10a
-
-# Cell PRS0816CDG_18;1{sch}
-CPRS0816CDG_18;1{sch}||schematic|1185175551078|1247545671385|I|ATTR_CDL_template(D5G2;NTX24.5;Y-51.5;)SX$(node_name) $(C) $(DS) $(I) $(IE) $(OEN) $(PAD) $(PE) $(POC18) $(PS) $(VDDPST18) $(VSS) $(VSSPST18) $(VDD) /PRS0816CDG_18|ATTR_NCC(D5G2;NTX-5.5;Y-42.5;)S[blackBox Artisan pad layout does not exist properly in electric,joinGroup tpdn90g18:PRS0816CDG_18{lay}]|ATTR_SPICE_netlist_file(D5G2;NTX-5.5;Y-47.5;)Stpdn90g18_3.spi
-IPRS0816CDG_18;1{ic}|PVDD2CDG@0||51|23|||D5G4;
-Ngeneric:Facet-Center|art@0||0|0||||AV
-NOff-Page|conn@1||-30|5||||
-NOff-Page|conn@2||10|5||||
-NOff-Page|conn@3||-30|-4||||
-NOff-Page|conn@4||10|-4||||
-NOff-Page|conn@5||-30|-15||||
-NOff-Page|conn@6||10|-15||||
-NOff-Page|conn@7||-30|-26||||
-NOff-Page|conn@8||10|-26||||
-NOff-Page|conn@9||-30|-35||||
-NOff-Page|conn@10||10|-35||||
-NOff-Page|conn@11||36|1|||RRR|
-NOff-Page|conn@12||57|1|||RRR|
-NOff-Page|conn@13||64|1|||RRR|
-NOff-Page|conn@14||78|1|||XRRR|
-NOff-Page|conn@15||71|1|||XRRR|
-NOff-Page|conn@16||50|1|||RRR|
-NOff-Page|conn@17||43|1|||R|
-NOff-Page|conn@20||72|-42.5||||
-Ngeneric:Invisible-Pin|pin@2||58|-10|||||ART_message(D5G2;)SDS (drive select) : DS=0 is 8mA, DS=1 is 16mA
-Ngeneric:Invisible-Pin|pin@3||58|-14|||||ART_message(D5G2;)SIE (input enable) : IE=1 sets as input pad
-Ngeneric:Invisible-Pin|pin@4||-10|17|||||ART_message(D5G3;)Spad is NOT inverting (in or out)
-Ngeneric:Invisible-Pin|pin@5||58|-18|||||ART_message(D5G2;)SOEN (output enable) : OEN=0 sets as output pad
-Ngeneric:Invisible-Pin|pin@6||58|-22|||||ART_message(D5G2;)SI (input) : core to pad data (if used)
-Ngeneric:Invisible-Pin|pin@7||58|-26|||||ART_message(D5G2;)SC (output) : pad to core data (if used)
-Ngeneric:Invisible-Pin|pin@8||58|-33|||||ART_message(D5G2;)S[PE/PS (pull enable/select) : see table,PE/PS = 0X   no pull,PE/PS = 10   pull down,PE/PS = 11   pull up]
-Ngeneric:Invisible-Pin|pin@9||-9.5|34.5|||||ART_message(D5G5;)SPRS0816CDG_18
-Ngeneric:Invisible-Pin|pin@10||-11|25.5|||||ART_message(D5G3;)S[configurable signal I/O pin,use one of config_input/output,to set pad direction]
-NWire_Pin|pin@19||40|-42.5||||
-NWire_Pin|pin@20||40|-4||||
-Ngeneric:Invisible-Pin|pin@21||57.5|-47|||||ART_message(C18;D5G2;)S[in order for the XML generator to work correctly,"at the top level, you need to short I, C, and PAD together"]
-NWire_Pin|pin@22||36|-4||||
-Awire|PAD|D5G2;||2700|pin@19||40|-42.5|pin@20||40|-4
-Awire|net@3|||0|conn@4|a|8|-4|conn@3|y|-28|-4
-Awire|net@4|||0|conn@6|a|8|-15|conn@5|y|-28|-15
-Awire|net@7|||0|conn@10|a|8|-35|conn@9|y|-28|-35
-Awire|net@8|||1800|conn@1|y|-28|5|conn@2|a|8|5
-Awire|net@17|||1800|conn@7|y|-28|-26|conn@8|a|8|-26
-Awire|net@22|||0|conn@20|a|70|-42.5|pin@19||40|-42.5
-Awire|net@23|||900|conn@11|y|36|-1|pin@22||36|-4
-Awire|net@24|||0|pin@20||40|-4|pin@22||36|-4
-Awire|net@25|||2250|pin@20||40|-4|conn@17|a|43|-1
-EC||D5G2;|conn@17|y|O
-EOEN_1|DS|D5G2;|conn@13|a|I
-EI||D5G2;|conn@11|a|I
-EPE_1|IE|D5G2;|conn@16|a|I
-EI_1|OEN|D5G2;|conn@12|a|I
-EPGATE_1|PAD|D5G2;|conn@20|y|B
-EPS_1|PE|D5G2;|conn@15|a|I
-EPOC18||D5G2;|conn@5|a|B
-EPOC18_1||D5G2;|conn@6|y|B
-EDS_1|PS|D5G2;|conn@14|a|I
-EVDD||D5G2;|conn@1|a|P
-EVDDPST18||D5G2;|conn@7|a|P
-EVDDPST18_1||D5G2;|conn@8|y|P
-EVDD_1||D5G2;|conn@2|y|P
-EVSS||D5G2;|conn@3|a|G
-EVSSPST18||D5G2;|conn@9|a|G
-EVSSPST18_1||D5G2;|conn@10|y|G
-EVSS_1||D5G2;|conn@4|y|G
-X