change HSIMSPEED to 4, remove flushing lines

[fleet.git] / marina / testCode / header.hsp

diff --git a/marina/testCode/header.hsp b/marina/testCode/header.hsp
index 28df10f..8e8abdf 100644 (file)
--- a/marina/testCode/header.hsp
+++ b/marina/testCode/header.hsp
@@ -5,14 +5,21 @@
 ******************************************************************
 
 .protect
+
+* 90nm
 .lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT
 .lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_RES
 .lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_18
 .lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_na18
 .lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_DIO_esd
 .lib '/import/async/cad/process/tsmc090/spice_models/models/cln90g_lk.l' TT_DIO_18
+
+* 40nm
+* .lib '/import/async/cad/process/tsmcsun045/sun_spice_models/1.01/models/toplevel_cln40gp.l' TOP_TT
+
 .unprotect
 
+
 .param sup=0.9    * Supply voltage
 .temp 80          * Temperature
 
@@ -39,7 +46,7 @@ vvdd vdd gnd 'sup'
 ******************************************************************
 * hsim gunk
 ******************************************************************
-* .hsimparam HSIMDCINIT=0
+.hsimparam HSIMDCINIT=0
 .hsimparam HSIMVDD=0.9
 .param HSIMSTOPAT=0
 
@@ -48,14 +55,17 @@ vvdd vdd gnd 'sup'
 
 .param HSIMOUTPUT=out
 
-.param HSIMPRINTSIMSTATUS=1
-.param HSIMOUTPUTFLUSH=200n
+* .param HSIMPRINTSIMSTATUS=1
+* .param HSIMOUTPUTFLUSH=1n
 
 * .param HSIMSPEED=8
 
-.param HSIMSPEED=5
+* for extracted-layout simulation
 .param HSIMPOSTL=3
 
+* I used to use HSIMSPEED=5, but the omega counter has simulation artifacts at that level
+.param HSIMSPEED=4
+
 * defaults -- play with these?
 * .param HSIMSPEED=3
 * .param HSIMPORTV=0.001