rename ItemForShip to DataForShip for consistency

[fleet.git] / ships / Alu2.ship

diff --git a/ships/Alu2.ship b/ships/Alu2.ship
index 392be46..5fd3e91 100644 (file)
--- a/ships/Alu2.ship
+++ b/ships/Alu2.ship
@@ -10,10 +10,8 @@ data  out:  out
 == Constants ========================================================
 ADD: add the two arguments; treat link as carry
 SUB: subtract the two arguments; treat link as carry
-REM:
 MAX:
 MIN:
-SORT: output min(in1,in2) followed by max(in1,in2) (FIXME: redundant?)
 
 == TeX ==============================================================
 This ship is a two-input arithmetic unit.  It features several
@@ -34,19 +32,30 @@ move elsewhere:
 //MOD:
 
 == Fleeterpreter ====================================================
+public long resolveLiteral(String literal) {
+  if (literal.equals("ADD")) return 0;
+  if (literal.equals("SUB")) return 1;
+  if (literal.equals("MAX")) return 2;
+  if (literal.equals("MIN")) return 3;
+  return super.resolveLiteral(literal);
+}
 public void service() {
   if (box_in1.dataReadyForShip() &&
       box_in2.dataReadyForShip() &&
       box_inOp.dataReadyForShip() &&
-      box_out.readyForItemFromShip()) {
-      int a      = box_in1.removeDataForShip();
-      int b      = box_in2.removeDataForShip();
-      int op     = box_inOp.removeDataForShip();
-      switch(op) {
+      box_out.readyForDataFromShip()) {
+      long a      = box_in1.removeDataForShip();
+      long b      = box_in2.removeDataForShip();
+      long op     = box_inOp.removeDataForShip();
+      switch((int)op) {
           case 0: box_out.addDataFromShip(a+b); // ADD
               break;
           case 1: box_out.addDataFromShip(a-b); // SUB
               break;
+          case 2: box_out.addDataFromShip(Math.max(a,b)); // MAX
+              break;
+          case 3: box_out.addDataFromShip(Math.min(a,b)); // MIN
+              break;
           default: box_out.addDataFromShip(0);
               break;
       }
@@ -57,14 +66,6 @@ public void service() {
 
 == FPGA ==============================================================
 
-  input  clk;
-  `input(in1_r,    in1_a,    in1_a_,  [(`DATAWIDTH-1):0], in1_d)
-  `input(in2_r,    in2_a,    in2_a_,  [(`DATAWIDTH-1):0], in2_d)
-  `input(inOp_r,   inOp_a,   inOp_a_, [(`DATAWIDTH-1):0], inOp_d)
-  `output(out_r, out_r_, out_a, [(`DATAWIDTH-1):0], out_d_)
-
-  `defreg(out_d_, [(`DATAWIDTH-1):0], out_d)
-
   reg                    have_a;
   reg [(`DATAWIDTH-1):0] reg_a;
   reg                    have_b;
@@ -87,9 +88,8 @@ public void service() {
       case (reg_op)
         0: out_d = reg_a + reg_b;
         1: out_d = reg_a - reg_b;
-        //2: out_d = reg_a * reg_b; // will not synthesize --AM
-        //3: out_d = reg_a / reg_b; // will not synthesize --AM
-        //4: out_d = reg_a % reg_b; // will not synthesize --AM
+        2: out_d = reg_a > reg_b ? reg_a : reg_b;
+        3: out_d = reg_a > reg_b ? reg_b : reg_a;
         default: out_d = 0;
       endcase        
       `onwrite(out_r, out_a)
@@ -100,7 +100,6 @@ public void service() {
     end
   end
 
-endmodule