single-mode Alu3

[fleet.git] / ships / BitFifo.ship

diff --git a/ships/BitFifo.ship b/ships/BitFifo.ship
index b64ddc5..facf07d 100644 (file)
--- a/ships/BitFifo.ship
+++ b/ships/BitFifo.ship
@@ -11,6 +11,9 @@ in:   inEnqueueOp
 out:  outDequeue
 in:   inDequeueOp
   
+== Sample Code ======================================================
+
+
 == Constants ========================================================
 
 == TeX ==============================================================
@@ -74,22 +77,22 @@ was actually {\tt 37-Offset-Count} for all directions below.
 }
 
 \begin{itemize}
-   \item [\tt Until]  ({\bf Shift until you see a (0, 1)})
-   \item [\tt Sort]   ({\bf Sort the Bits})
-   \item [\tt Get]    ({\bf Get the value of the counter})
-   \item [\tt Rev]    ({\bf Reverse Before Enqueue})
-   \item [\tt Inv]    ({\bf Invert Count}) -- treat {\tt Count} as {\tt 37-Offset-Count}
-   \item [\tt Rst]    ({\bf Reset Counter Before Operation})
-   \item [\tt Left Fill]  ({\bf Left Fill (0, 1, sign)})
+   \item [\tt Until]       ({\bf Shift until you see a (0, 1)})
+   \item [\tt Sort]        ({\bf Sort the Bits})
+   \item [\tt Get]         ({\bf Get the value of the counter})
+   \item [\tt Rev]         ({\bf Reverse Before Enqueue})
+   \item [\tt Inv]         ({\bf Invert Count}) -- treat {\tt Count} as {\tt 37-Offset-Count}
+   \item [\tt Rst]         ({\bf Reset Counter Before Operation})
+   \item [\tt Left Fill]   ({\bf Left Fill (0, 1, sign)})
    \item [\tt Right Fill]  ({\bf Right Fill (0, 1, sign)})
-   \item [\tt Count]  ({\bf Count of Bits To Enqueue})
-   \item [\tt Offset] ({\bf Offset of Bits To Enqueue})
+   \item [\tt Count]       ({\bf Count of Bits To Dequeue})
+   \item [\tt Offset]      ({\bf Offset of Bits To Dequeue})
 \end{itemize}
 
 
 == Fleeterpreter ====================================================
 // Internal storage
-private static class BitStorage {
+static class BitStorage {
   long[] bits;
   int numbits = 0;
   int start = 0;
@@ -305,6 +308,22 @@ private static final int MAXBITS = 128;
 private static final int WORDSIZE = 37;
 private BitStorage bits = new BitStorage(MAXBITS);
 
+// dummy routine used for Alu3 test -- FIXME later but keep this functionality somehow!
+public void service() {
+  if (!box_outDequeue.readyForDataFromShip() && !box_inEnqueue.dataReadyForShip()) return;
+  if (box_inEnqueue.dataReadyForShip() && bits.hasSpace(WORDSIZE)) {
+    long data = box_inEnqueue.removeDataForShip();
+    bits.add(data, WORDSIZE);
+    return;
+  }
+  if (box_outDequeue.readyForDataFromShip() && bits.size() > 0) {
+    long data = bits.get(1) == 0 ? 0L : 0x1FFFFFFFFFL;
+    box_outDequeue.addDataFromShip(data);
+    return;
+  }
+}
+
+/*
 public void service() {
   if (!box_outDequeue.readyForDataFromShip() && !box_inEnqueue.dataReadyForShip()) return;
   if (box_inEnqueue.dataReadyForShip() && bits.hasSpace(WORDSIZE)) {
@@ -341,10 +360,81 @@ public void service() {
     return;
   }
 }
+*/
 
 == FleetSim ==============================================================
 
 == FPGA ==============================================================
+  reg [73:0] bitstorage;
+  reg [7:0] bitstorage_count;          initial bitstorage_count = 0;
+
+  always @(posedge clk) begin
+    if (bitstorage_count == 0) begin
+      `onread(inEnqueue_r, inEnqueue_a)
+        bitstorage       <= inEnqueue_d;
+        bitstorage_count <= 37;
+        outDequeue_d     <= (inEnqueue_d[0] ? 37'b1111111111111111111111111111111111111 : 0);
+      end
+    end else begin
+      `onwrite(outDequeue_r, outDequeue_a)
+        bitstorage_count <= bitstorage_count - 1;
+        outDequeue_d     <= (bitstorage[1] ? 37'b1111111111111111111111111111111111111 : 0);
+        bitstorage       <= bitstorage >> 1;
+      end
+    end
+  end
+
+
+== Test ==============================================================
+
+// expected output
+#expect 137438953471
+#expect 137438953471
+#expect 0
+#expect 0
+#expect 0
+#expect 137438953471
+#expect 137438953471
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+#expect 0
+
+// ships required in order to run this code
+#ship debug        : Debug
+#ship bitfifo      : BitFifo
+
+debug.in:           [*] take, deliver;
+99:                 sendto bitfifo.inEnqueue;
+bitfifo.inEnqueue:  take, deliver;
+bitfifo.outDequeue: [*] take, sendto debug.in;
 
 == Contributors =========================================================
 Amir Kamil <kamil@cs.berkeley.edu>
+Adam Megacz <megacz@cs.berkeley.edu>